1 //<MStar Software>
2 //******************************************************************************
3 // MStar Software
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76 //******************************************************************************
77 //<MStar Software>
78 ////////////////////////////////////////////////////////////////////////////////
79 //
80 // Copyright (c) 2010-2012 MStar Semiconductor, Inc.
81 // All rights reserved.
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92 //
93 ////////////////////////////////////////////////////////////////////////////////
94
95 ////////////////////////////////////////////////////////////////////////////////////////////////////
96 // file halMMFilein.c
97 // @brief Multimedia File In (MMFILEIN) HAL
98 // @author MStar Semiconductor,Inc.
99 ////////////////////////////////////////////////////////////////////////////////////////////////////
100 #include "MsCommon.h"
101 #include "regMMFilein.h"
102 #include "halMMFilein.h"
103 #include "halCHIP.h"
104
105
106 //--------------------------------------------------------------------------------------------------
107 // Driver Compiler Option
108 //--------------------------------------------------------------------------------------------------
109 #define MIU_BUS 4UL
110
111 //--------------------------------------------------------------------------------------------------
112 // TSP Hardware Abstraction Layer
113 //--------------------------------------------------------------------------------------------------
114 static REG_Ctrl_MMFI* _MFCtrl= NULL;
115 static REG_Ctrl_MMFI2* _MFCtrl2 = NULL;
116
117 static MS_VIRT _virtMMFIRegBase = 0;
118 static MS_PHY _phyMMFIMiuOffset[MMFI_ENGINE_NUM] = {[0 ... (MMFI_ENGINE_NUM-1)] = 0UL};
119
120
121 #ifdef MSOS_TYPE_LINUX_KERNEL
122 static MS_U16 _u16MMFIRegArray[128] = {[0 ... 127] = 0UL};
123 #endif
124
125
126 //[NOTE] Jerry
127 // Some register has write order, for example, writing PCR_L will disable PCR counter
128 // writing PCR_M trigger nothing, writing PCR_H will enable PCR counter
129 #define _HAL_REG32_W(reg, value) do { (reg)->L = ((value) & 0x0000FFFFUL); \
130 (reg)->H = ((value) >> 16UL); } while(0)
131
132 #define _HAL_REG16_W(reg, value) do { (reg)->data = (MS_U16)((value) & 0xFFFF);} while(0)
133
134 #define TSP_TSP5_REG(addr) (*((volatile MS_U16*)(_virtMMFIRegBase + 0xC7600UL + ((addr)<<2UL))))
135 #define REG_TSP5_INIT_TIMESTAMP 0x07UL
136 #define REG_TSP5_INIT_MMFI0_TIMESTAMP 2UL
137 #define REG_TSP5_INIT_MMFI1_TIMESTAMP 4UL
138 #define REG_TSP5_TIMESTAMP_MMFI0_L 0x65UL
139 #define REG_TSP5_TIMESTAMP_MMFI0_H 0x66UL
140 #define REG_TSP5_TIMESTAMP_MMFI1_L 0x67UL
141 #define REG_TSP5_TIMESTAMP_MMFI1_H 0x68UL
142
143 #define MMFI_REG(addr) (*((volatile MS_U16*)(_virtMMFIRegBase + REG_CTRL_BASE_MMFI0 + ((addr)<<2UL))))
144
145
146 //--------------------------------------------------------------------------------------------------
147 // Macro of bit operations
148 //--------------------------------------------------------------------------------------------------
149
150 //--------------------------------------------------------------------------------------------------
151 // Implementation
152 //--------------------------------------------------------------------------------------------------
_HAL_REG32_R(REG32 * reg)153 static MS_U32 _HAL_REG32_R(REG32 *reg)
154 {
155 MS_U32 value = 0UL;
156 value = (reg)->H << 16UL;
157 value |= (reg)->L;
158 return value;
159 }
160
_HAL_REG16_R(REG16 * reg)161 static MS_U16 _HAL_REG16_R(REG16 *reg)
162 {
163 MS_U16 value = 0;
164 value = (reg)->data;
165 return value;
166 }
167
_HAL_MMFI_MIU_OFFSET(MS_PHY Phyaddr)168 static MS_PHY _HAL_MMFI_MIU_OFFSET(MS_PHY Phyaddr)
169 {
170 #ifdef HAL_MIU2_BASE
171 if(Phyaddr >= (MS_PHY)HAL_MIU2_BASE)
172 return (MS_PHY)HAL_MIU2_BASE;
173 else
174 #endif //HAL_MIU2_BASE
175 #ifdef HAL_MIU1_BASE
176 if(Phyaddr >= (MS_PHY)HAL_MIU1_BASE)
177 return (MS_PHY)HAL_MIU1_BASE;
178 else
179 #endif //HAL_MIU1_BASE
180 return (MS_PHY)HAL_MIU0_BASE;
181 }
182
HAL_MMFI_SetBank(MS_VIRT virtBank)183 void HAL_MMFI_SetBank(MS_VIRT virtBank)
184 {
185 _virtMMFIRegBase = virtBank;
186 _MFCtrl = (REG_Ctrl_MMFI*)(_virtMMFIRegBase+ REG_CTRL_BASE_MMFI0);
187 _MFCtrl2 = (REG_Ctrl_MMFI2*)(_virtMMFIRegBase + REG_CTRL2);
188 }
189
190 // ------------------------------------------------------
191 // APIs
192 //-------------------------------------------------------
HAL_MMFI_PidFlt_Set(MS_U8 u8Eng,MS_U8 u8Idx,MS_U16 u16PID,MS_U32 u32entype)193 void HAL_MMFI_PidFlt_Set(MS_U8 u8Eng, MS_U8 u8Idx, MS_U16 u16PID, MS_U32 u32entype)
194 {
195 REG32* Reg = NULL;
196
197 if(u8Idx < (MS_U8)MMFI_PIDFLT_GROUP0)
198 {
199 Reg = &(_MFCtrl[u8Eng].PidFlt[u8Idx]);
200 }
201 else
202 {
203 Reg = &(_MFCtrl2[0].PidFlt[u8Eng][u8Idx - (MS_U8)MMFI_PIDFLT_GROUP0]);
204 }
205
206 _HAL_REG32_W(Reg, ((MS_U32)u16PID & 0xFFFFUL) | u32entype);
207 }
208
HAL_MMFI_PidFlt_SetPid(MS_U8 u8Eng,MS_U8 u8Idx,MS_U16 u16PID)209 void HAL_MMFI_PidFlt_SetPid(MS_U8 u8Eng, MS_U8 u8Idx, MS_U16 u16PID)
210 {
211 MS_U32 u32data;
212 REG32* Reg = NULL;
213
214 if(u8Idx < (MS_U8)MMFI_PIDFLT_GROUP0)
215 {
216 Reg = &(_MFCtrl[u8Eng].PidFlt[u8Idx]);
217 }
218 else
219 {
220 Reg = &(_MFCtrl2[0].PidFlt[u8Eng][u8Idx - (MS_U8)MMFI_PIDFLT_GROUP0]);
221 }
222
223 u32data = (_HAL_REG32_R(Reg) & ~MMFI_PIDFLT_PID_MASK) | ((MS_U32)u16PID & 0xFFFFUL);
224 _HAL_REG32_W(Reg, u32data);
225 }
226
HAL_MMFI_PidFlt_Enable(MS_U8 u8Eng,MS_U8 u8Idx,MS_U32 u32entype,MS_BOOL benable)227 void HAL_MMFI_PidFlt_Enable(MS_U8 u8Eng, MS_U8 u8Idx, MS_U32 u32entype, MS_BOOL benable)
228 {
229 MS_U32 u32data;
230 REG32* Reg = NULL;
231
232 if(u8Idx < (MS_U8)MMFI_PIDFLT_GROUP0)
233 {
234 Reg = &(_MFCtrl[u8Eng].PidFlt[u8Idx]);
235 }
236 else
237 {
238 Reg = &(_MFCtrl2[0].PidFlt[u8Eng][u8Idx - (MS_U8)MMFI_PIDFLT_GROUP0]);
239 }
240
241 u32data = _HAL_REG32_R(Reg) & ~MMFI_PIDFLT_EN_MASK;
242
243 if(benable)
244 u32data |= u32entype;
245
246 _HAL_REG32_W(Reg, u32data);
247 }
248
HAL_MMFI_PidFlt_Reset(MS_U8 u8Eng,MS_U8 u8Idx)249 void HAL_MMFI_PidFlt_Reset(MS_U8 u8Eng, MS_U8 u8Idx)
250 {
251 REG32* Reg = NULL;
252
253 if(u8Idx < (MS_U8)MMFI_PIDFLT_GROUP0)
254 {
255 Reg = &(_MFCtrl[u8Eng].PidFlt[u8Idx]);
256 }
257 else
258 {
259 Reg = &(_MFCtrl2[0].PidFlt[u8Eng][u8Idx - (MS_U8)MMFI_PIDFLT_GROUP0]);
260 }
261
262 _HAL_REG32_W(Reg, MMFI_PID_NULL);
263 }
264
HAL_MMFI_Set_Filein_ReadAddr(MS_U8 u8Eng,MS_PHY phyAddr)265 void HAL_MMFI_Set_Filein_ReadAddr(MS_U8 u8Eng, MS_PHY phyAddr)
266 {
267 _phyMMFIMiuOffset[u8Eng] = _HAL_MMFI_MIU_OFFSET(phyAddr);
268 _HAL_REG32_W(&(_MFCtrl[u8Eng].FileIn_RAddr), (MS_U32)(phyAddr - _phyMMFIMiuOffset[u8Eng]));
269 }
270
HAL_MMFI_Set_Filein_ReadLen(MS_U8 u8Eng,MS_U32 u32len)271 void HAL_MMFI_Set_Filein_ReadLen(MS_U8 u8Eng, MS_U32 u32len)
272 {
273 _HAL_REG32_W(&(_MFCtrl[u8Eng].FileIn_RNum), u32len);
274 }
275
HAL_MMFI_Set_Filein_Ctrl(MS_U8 u8Eng,MS_U16 u16ctrl,MS_BOOL bEnable)276 void HAL_MMFI_Set_Filein_Ctrl(MS_U8 u8Eng, MS_U16 u16ctrl, MS_BOOL bEnable)
277 {
278 if(bEnable)
279 {
280 _HAL_REG16_W(&(_MFCtrl[u8Eng].FileIn_Ctrl), _HAL_REG16_R(&(_MFCtrl[u8Eng].FileIn_Ctrl)) | u16ctrl);
281 }
282 else
283 {
284 _HAL_REG16_W(&(_MFCtrl[u8Eng].FileIn_Ctrl), _HAL_REG16_R(&(_MFCtrl[u8Eng].FileIn_Ctrl)) & ~u16ctrl);
285 }
286 }
287
HAL_MMFI_Get_Filein_Ctrl(MS_U8 u8Eng)288 MS_U16 HAL_MMFI_Get_Filein_Ctrl(MS_U8 u8Eng)
289 {
290 return (_HAL_REG16_R(&(_MFCtrl[u8Eng].FileIn_Ctrl)) & MMFI_FILEIN_CTRL_MASK);
291 }
292
HAL_MMFI_Set_FileinTimer(MS_U8 u8Eng,MS_U8 u8timer)293 void HAL_MMFI_Set_FileinTimer(MS_U8 u8Eng, MS_U8 u8timer)
294 {
295 MS_U16 u16data = (_HAL_REG16_R(&(_MFCtrl[u8Eng].FileIn_Ctrl)) & ~MMFI_FILEIN_TIMER_MASK) | (((MS_U16)u8timer & 0x00FF) << MMFI_FILEIN_TIMER_SHIFT);
296 _HAL_REG16_W(&(_MFCtrl[u8Eng].FileIn_Ctrl), u16data);
297 }
298
HAL_MMFI_Get_Filein_WriteAddr(MS_U8 u8Eng)299 MS_PHY HAL_MMFI_Get_Filein_WriteAddr(MS_U8 u8Eng)
300 {
301 MS_PHY phyaddr = 0;
302
303 HAL_MMFI_Cfg_Enable(u8Eng, MMFI_CFG_RADDR_READ, FALSE);
304 phyaddr = (MS_PHY)(_HAL_REG32_R(&(_MFCtrl[u8Eng].RAddr)) << MIU_BUS) + _phyMMFIMiuOffset[u8Eng];
305 HAL_MMFI_Cfg_Enable(u8Eng, MMFI_CFG_RADDR_READ, TRUE);
306
307 return phyaddr;
308 }
309
HAL_MMFI_CmdQ_FIFO_Get_WRCnt(MS_U8 u8Eng)310 MS_U16 HAL_MMFI_CmdQ_FIFO_Get_WRCnt(MS_U8 u8Eng)
311 {
312 return (_HAL_REG16_R(&(_MFCtrl[u8Eng].CmdQSts)) & MMFI_CMDQSTS_WRCNT_MASK);
313 }
314
HAL_MMFI_CmdQ_FIFO_IsFull(MS_U8 u8Eng)315 MS_BOOL HAL_MMFI_CmdQ_FIFO_IsFull(MS_U8 u8Eng)
316 {
317 return (MS_BOOL)(_HAL_REG16_R(&(_MFCtrl[u8Eng].CmdQSts)) & MMFI_CMDQSTS_FIFO_FULL);
318 }
319
HAL_MMFI_CmdQ_FIFO_IsEmpty(MS_U8 u8Eng)320 MS_BOOL HAL_MMFI_CmdQ_FIFO_IsEmpty(MS_U8 u8Eng)
321 {
322 return (MS_BOOL)(_HAL_REG16_R(&(_MFCtrl[u8Eng].CmdQSts)) & MMFI_CMDQSTS_FIFO_EMPTY);
323 }
324
HAL_MMFI_CmdQ_FIFO_Get_WRLevel(MS_U8 u8Eng)325 MS_U16 HAL_MMFI_CmdQ_FIFO_Get_WRLevel(MS_U8 u8Eng)
326 {
327 return ((_HAL_REG16_R(&(_MFCtrl[u8Eng].CmdQSts)) & MMFI_CMDQSTS_FIFO_WRLEVEL_MASK) >> MMFI_CMDQSTS_FIFO_WRLEVEL_SHIFT);
328 }
329
HAL_MMFI_Cfg_Enable(MS_U8 u8Eng,MS_U32 u32CfgItem,MS_BOOL benable)330 void HAL_MMFI_Cfg_Enable(MS_U8 u8Eng, MS_U32 u32CfgItem, MS_BOOL benable)
331 {
332 if(benable)
333 {
334 _HAL_REG32_W(&(_MFCtrl[u8Eng].Cfg), (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg)) | u32CfgItem));
335 }
336 else
337 {
338 _HAL_REG32_W(&(_MFCtrl[u8Eng].Cfg), (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg)) & ~u32CfgItem));
339 }
340 }
341
HAL_MMFI_Cfg_Set(MS_U8 u8Eng,MS_U32 u32CfglItem)342 void HAL_MMFI_Cfg_Set(MS_U8 u8Eng, MS_U32 u32CfglItem)
343 {
344 _HAL_REG32_W(&(_MFCtrl[u8Eng].Cfg), u32CfglItem);
345 }
346
HAL_MMFI_Cfg_Get(MS_U8 u8Eng)347 MS_U32 HAL_MMFI_Cfg_Get(MS_U8 u8Eng)
348 {
349 return (_HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg)));
350 }
351
HAL_MMFI_Cfg2_Enable(MS_U8 u8Eng,MS_U16 u16CfgItem,MS_BOOL benable)352 void HAL_MMFI_Cfg2_Enable(MS_U8 u8Eng, MS_U16 u16CfgItem, MS_BOOL benable)
353 {
354 if(benable)
355 {
356 _HAL_REG16_W(&(_MFCtrl2[0].Cfg2[u8Eng]), (_HAL_REG16_R(&(_MFCtrl2[0].Cfg2[u8Eng])) | u16CfgItem));
357 }
358 else
359 {
360 _HAL_REG16_W(&(_MFCtrl2[0].Cfg2[u8Eng]), (_HAL_REG16_R(&(_MFCtrl2[0].Cfg2[u8Eng])) & ~u16CfgItem));
361 }
362 }
363
HAL_MMFI_Cfg2_Set(MS_U8 u8Eng,MS_U16 u16CfglItem)364 void HAL_MMFI_Cfg2_Set(MS_U8 u8Eng, MS_U16 u16CfglItem)
365 {
366 _HAL_REG16_W(&(_MFCtrl2[0].Cfg2[u8Eng]), u16CfglItem);
367 }
368
HAL_MMFI_Cfg2_Get(MS_U8 u8Eng)369 MS_U16 HAL_MMFI_Cfg2_Get(MS_U8 u8Eng)
370 {
371 return (_HAL_REG16_R(&(_MFCtrl2[0].Cfg2[u8Eng])));
372 }
373
374
HAL_MMFI_Get_TsHeaderInfo(MS_U8 u8Eng,MS_U32 * pu32header)375 void HAL_MMFI_Get_TsHeaderInfo(MS_U8 u8Eng, MS_U32 *pu32header)
376 {
377 *pu32header = _HAL_REG32_R(&(_MFCtrl[u8Eng].TsHeader));
378 }
379
HAL_MMFI_Get_APid_Status(MS_U8 u8Eng,MS_U16 * pu16pid,MS_BOOL * pbchanged)380 void HAL_MMFI_Get_APid_Status(MS_U8 u8Eng, MS_U16 *pu16pid, MS_BOOL *pbchanged)
381 {
382 MS_U16 u16temp;
383
384 u16temp = (MS_U16)_HAL_REG16_R(&(_MFCtrl[u8Eng].APid_Status));
385
386 *pu16pid = u16temp & MMFI_APID_MATCHED_MASK;
387 *pbchanged = (MS_BOOL)(u16temp & MMFI_APID_CHANGE);
388 }
389
HAL_MMFI_Get_APidB_Status(MS_U8 u8Eng,MS_U16 * pu16pid,MS_BOOL * pbchanged)390 void HAL_MMFI_Get_APidB_Status(MS_U8 u8Eng, MS_U16 *pu16pid, MS_BOOL *pbchanged)
391 {
392 MS_U16 u16temp;
393
394 u16temp = _HAL_REG16_R(&(_MFCtrl[u8Eng].APidB_Status));
395
396 *pu16pid = u16temp & MMFI_APIDB_MATCHED_MASK;
397 *pbchanged = (MS_BOOL)(u16temp & MMFI_APIDB_CHANGE);
398 }
399
HAL_MMFI_Get_VPid_Status(MS_U8 u8Eng,MS_U16 * pu16pid,MS_BOOL * pbchanged)400 void HAL_MMFI_Get_VPid_Status(MS_U8 u8Eng, MS_U16 *pu16pid, MS_BOOL *pbchanged)
401 {
402 MS_U16 u16temp;
403
404 u16temp = _HAL_REG16_R(&(_MFCtrl[u8Eng].VPID_Status));
405
406 *pu16pid = u16temp & MMFI_VPID_MATCHED_MASK;
407 *pbchanged = (MS_BOOL)(u16temp & MMFI_VPID_CHANGE);
408 }
409
HAL_MMFI_Get_VPid3D_Status(MS_U8 u8Eng,MS_U16 * pu16pid,MS_BOOL * pbchanged)410 void HAL_MMFI_Get_VPid3D_Status(MS_U8 u8Eng, MS_U16 *pu16pid, MS_BOOL *pbchanged)
411 {
412 MS_U16 u16temp;
413
414 u16temp = _HAL_REG16_R(&(_MFCtrl[u8Eng].VPID3D_Status));
415
416 *pu16pid = u16temp & MMFI_VPID3D_MATCHED_MASK;
417 *pbchanged = (MS_BOOL)(u16temp & MMFI_VPID3D_CHANGE);
418 }
419
HAL_MMFI_LPcr2_Set(MS_U8 u8Eng,MS_U32 u32lpcr2)420 void HAL_MMFI_LPcr2_Set(MS_U8 u8Eng, MS_U32 u32lpcr2)
421 {
422
423 HAL_MMFI_Cfg_Enable(u8Eng, MMFI_CFG_LPCR2_WLD, TRUE);
424 _HAL_REG32_W(&(_MFCtrl[u8Eng].LPcr2_Buf), u32lpcr2);
425 HAL_MMFI_Cfg_Enable(u8Eng, MMFI_CFG_LPCR2_WLD, FALSE);
426
427 }
428
HAL_MMFI_LPcr2_Get(MS_U8 u8Eng)429 MS_U32 HAL_MMFI_LPcr2_Get(MS_U8 u8Eng)
430 {
431 MS_U32 u32value;
432
433 HAL_MMFI_Cfg_Enable(u8Eng, MMFI_CFG_LPCR2_LD, TRUE);
434 u32value = _HAL_REG32_R(&(_MFCtrl[u8Eng].LPcr2_Buf));
435 HAL_MMFI_Cfg_Enable(u8Eng, MMFI_CFG_LPCR2_LD, FALSE);
436
437 return u32value;
438 }
439
HAL_MMFI_TimeStamp_Get(MS_U8 u8Eng)440 MS_U32 HAL_MMFI_TimeStamp_Get(MS_U8 u8Eng)
441 {
442 return _HAL_REG32_R(&(_MFCtrl[u8Eng].TimeStamp_FIn));
443 }
444
HAL_MMFI_PktChkSize_Set(MS_U8 u8Eng,MS_U16 u16size)445 void HAL_MMFI_PktChkSize_Set(MS_U8 u8Eng, MS_U16 u16size)
446 {
447 _HAL_REG16_W(&(_MFCtrl[u8Eng].PktChkSize), (_HAL_REG16_R(&(_MFCtrl[u8Eng].PktChkSize)) & ~MMFI_PKTCHK_SIZE_MASK) | u16size);
448 }
449
HAL_MMFI_MOBF_Set_FileinKey(MS_U8 u8Eng,MS_U16 u16KeyIndex)450 void HAL_MMFI_MOBF_Set_FileinKey(MS_U8 u8Eng, MS_U16 u16KeyIndex)
451 {
452 _HAL_REG16_W(&(_MFCtrl[u8Eng].MOBFKey), u16KeyIndex);
453 }
454
HAL_MMFI_MOBF_Enable(MS_U8 u8Eng,MS_BOOL bEnable)455 void HAL_MMFI_MOBF_Enable(MS_U8 u8Eng, MS_BOOL bEnable)
456 {
457 return;
458 }
459
HAL_MMFI_AU_RemoveDupPkt(MS_U8 u8Eng,MS_BOOL bEnable)460 void HAL_MMFI_AU_RemoveDupPkt(MS_U8 u8Eng, MS_BOOL bEnable)
461 {
462 MS_U32 u32data = _HAL_REG32_R(&(_MFCtrl[u8Eng].Cfg)) & ~MMFI_CFG_DUP_PKT_SKIP;
463
464 if(bEnable)
465 u32data |= MMFI_CFG_DUP_PKT_SKIP;
466
467 _HAL_REG32_W(&(_MFCtrl[u8Eng].Cfg), u32data);
468 }
469
HAL_MMFI_TimeStampClk_Set(MS_U8 u8Eng,MS_U32 u32ClkSrc)470 void HAL_MMFI_TimeStampClk_Set(MS_U8 u8Eng, MS_U32 u32ClkSrc)
471 {
472 if(u32ClkSrc == 0x0UL) // 90k
473 {
474 _HAL_REG16_W(&(_MFCtrl2[0].Cfg2[u8Eng]), _HAL_REG16_R(&(_MFCtrl2[0].Cfg2[u8Eng])) & ~MMFI_CFG2_MMFI_27M_EN);
475 }
476 else
477 {
478 _HAL_REG16_W(&(_MFCtrl2[0].Cfg2[u8Eng]), _HAL_REG16_R(&(_MFCtrl2[0].Cfg2[u8Eng])) | MMFI_CFG2_MMFI_27M_EN);
479 }
480 return;
481 }
482 //
483 // General API
484 //
HAL_MMFI_Reset(void)485 void HAL_MMFI_Reset(void)
486 {
487 _HAL_REG16_W(&(_MFCtrl[0].SWRst), (_HAL_REG16_R(&(_MFCtrl[0].SWRst)) &~ MMFI_SW_RSTZ_MMFILEIN_DISABLE));
488 _HAL_REG16_W(&(_MFCtrl[0].SWRst), (_HAL_REG16_R(&(_MFCtrl[0].SWRst)) | MMFI_SW_RSTZ_MMFILEIN_DISABLE));
489 }
490
HAL_MMFI_Reset_SubItem(MS_U16 u16RstItem)491 void HAL_MMFI_Reset_SubItem(MS_U16 u16RstItem)
492 {
493 _HAL_REG16_W(&(_MFCtrl[0].SWRst), (_HAL_REG16_R(&(_MFCtrl[0].SWRst)) | u16RstItem));
494 _HAL_REG16_W(&(_MFCtrl[0].SWRst), (_HAL_REG16_R(&(_MFCtrl[0].SWRst)) & ~u16RstItem));
495
496
497 // init MMFI time-stamp
498 if(u16RstItem == MMFI_RST_CMDQ0)
499 {
500 TSP_TSP5_REG(REG_TSP5_TIMESTAMP_MMFI0_L) = 0;
501 TSP_TSP5_REG(REG_TSP5_TIMESTAMP_MMFI0_H) = 0;
502 TSP_TSP5_REG(REG_TSP5_INIT_TIMESTAMP) = TSP_TSP5_REG(REG_TSP5_INIT_TIMESTAMP) | REG_TSP5_INIT_MMFI0_TIMESTAMP;
503 TSP_TSP5_REG(REG_TSP5_INIT_TIMESTAMP) = TSP_TSP5_REG(REG_TSP5_INIT_TIMESTAMP) & (~REG_TSP5_INIT_MMFI0_TIMESTAMP);
504 }
505 else if(u16RstItem == MMFI_RST_CMDQ1)
506 {
507 TSP_TSP5_REG(REG_TSP5_TIMESTAMP_MMFI1_L) = 0;
508 TSP_TSP5_REG(REG_TSP5_TIMESTAMP_MMFI1_H) = 0;
509 TSP_TSP5_REG(REG_TSP5_INIT_TIMESTAMP) = TSP_TSP5_REG(REG_TSP5_INIT_TIMESTAMP) | REG_TSP5_INIT_MMFI1_TIMESTAMP;
510 TSP_TSP5_REG(REG_TSP5_INIT_TIMESTAMP) = TSP_TSP5_REG(REG_TSP5_INIT_TIMESTAMP) & (~REG_TSP5_INIT_MMFI1_TIMESTAMP);
511 }
512
513 }
514
HAL_MMFI_Reset_All(void)515 void HAL_MMFI_Reset_All(void)
516 {
517 MS_U16 u16data = _HAL_REG16_R(&(_MFCtrl[0].SWRst)) & ~MMFI_SWRST_MASK;
518
519 _HAL_REG16_W(&(_MFCtrl[0].SWRst), u16data | MMFI_RST_ALL);
520 _HAL_REG16_W(&(_MFCtrl[0].SWRst), (u16data & ~MMFI_SWRST_MASK) | MMFI_SW_RSTZ_MMFILEIN_DISABLE);
521
522 }
523
HAL_MMFI_HWInt_Enable(MS_BOOL benable,MS_U16 u16init)524 void HAL_MMFI_HWInt_Enable(MS_BOOL benable, MS_U16 u16init)
525 {
526 MS_U16 u16data = _HAL_REG16_R(&(_MFCtrl[0].HWInt)) & ~u16init;
527
528 if(benable)
529 {
530 _HAL_REG16_W(&(_MFCtrl[0].HWInt), (u16data | u16init));
531 }
532 else
533 {
534 _HAL_REG16_W(&(_MFCtrl[0].HWInt), u16data);
535 }
536 }
537
HAL_MMFI_HWInt_Clear(MS_U16 u16Int)538 void HAL_MMFI_HWInt_Clear(MS_U16 u16Int)
539 {
540 _HAL_REG16_W(&(_MFCtrl[0].HWInt), (_HAL_REG16_R(&(_MFCtrl[0].HWInt)) & ~u16Int));
541 }
542
HAL_MMFI_HWInt_Status(void)543 MS_U32 HAL_MMFI_HWInt_Status(void)
544 {
545 return (MS_U32)(_HAL_REG16_R(&(_MFCtrl[0].HWInt)) & MMFI_HWINT_STS_MASK);
546 }
547
548
549 #ifdef MSOS_TYPE_LINUX_KERNEL
550
HAL_MMFI_SaveRegs(void)551 MS_BOOL HAL_MMFI_SaveRegs(void)
552 {
553 MS_U32 u32ii = 0;
554
555 for(u32ii = 0; u32ii <= 0x78; u32ii++)
556 {
557 _u16MMFIRegArray[u32ii] = MMFI_REG(u32ii);
558 }
559
560 return TRUE;
561 }
562
HAL_MMFI_RestoreRegs(void)563 MS_BOOL HAL_MMFI_RestoreRegs(void)
564 {
565 MS_U32 u32ii = 0, u32jj = 0, u32temp = 0;
566 MS_U16 u16temp = 0;
567
568 for(u32ii = 0; u32ii < MMFI_ENGINE_NUM; u32ii++)
569 {
570 for(u32jj = 0x00; u32jj <= 0x0b; u32jj++)
571 {
572 MMFI_REG(u32temp+u32jj) = _u16MMFIRegArray[u32temp+u32jj];
573 }
574 MMFI_REG(u32temp+0x0e) |= (_u16MMFIRegArray[u32temp+0x0e] & ~0x0083);
575 MMFI_REG(u32temp+0x0f) |= (_u16MMFIRegArray[u32temp+0x0f] & ~0x0001);
576 if(u32temp == 0)
577 {
578 MMFI_REG(0x1b) = _u16MMFIRegArray[0x1b];
579 }
580 MMFI_REG(u32temp+0x1c) = _u16MMFIRegArray[u32temp+0x1c];
581 u32temp += 0x20;
582 }
583 MMFI_REG(0x40) = _u16MMFIRegArray[0x40];
584 MMFI_REG(0x41) = _u16MMFIRegArray[0x41];
585 MMFI_REG(0x50) |= (_u16MMFIRegArray[0x50] & ~0x0600);
586 MMFI_REG(0x51) |= (_u16MMFIRegArray[0x51] & ~0x0600);
587
588 MMFI_REG(0x56) = _u16MMFIRegArray[0x56];
589 MMFI_REG(0x57) = _u16MMFIRegArray[0x57];
590 MMFI_REG(0x58) = _u16MMFIRegArray[0x58];
591 MMFI_REG(0x59) = _u16MMFIRegArray[0x59];
592 MMFI_REG(0x5e) = _u16MMFIRegArray[0x5e];
593 MMFI_REG(0x5f) = _u16MMFIRegArray[0x5f];
594 MMFI_REG(0x60) = _u16MMFIRegArray[0x60];
595 MMFI_REG(0x61) = _u16MMFIRegArray[0x61];
596 MMFI_REG(0x66) = _u16MMFIRegArray[0x66];
597 MMFI_REG(0x67) = _u16MMFIRegArray[0x67];
598 MMFI_REG(0x70) = _u16MMFIRegArray[0x70];
599 MMFI_REG(0x78) = _u16MMFIRegArray[0x78];
600
601 //restart file in
602 u16temp = 0;
603 for(u32ii = 0; u32ii < MMFI_ENGINE_NUM; u32ii++)
604 {
605 if((_u16MMFIRegArray[u16temp+0x0c] & MMFI_FILEIN_CTRL_DONE) == 0)
606 {
607 u16temp = (MMFI_REG(u16temp+0x0C) & MMFI_FILEIN_TIMER_MASK) >> MMFI_FILEIN_TIMER_SHIFT;
608 HAL_MMFI_Set_FileinTimer((MS_U8)u32ii, (MS_U8)u16temp);
609
610 u32temp = (MS_U32)MMFI_REG(u16temp+0x16) & 0xFFFF;
611 u32temp += (((MS_U32)MMFI_REG(u16temp+0x17) & 0xFFFF) << 16);
612 HAL_MMFI_LPcr2_Set((MS_U8)u32ii, u32temp);
613
614 HAL_MMFI_Cfg_Enable((MS_U8)u32ii, MMFI_CFG_BYTETIMER_EN, TRUE);
615 HAL_MMFI_Set_Filein_Ctrl((MS_U8)u32ii, MMFI_FILEIN_CTRL_START, TRUE);
616 }
617 }
618
619 return TRUE;
620 }
621
622 #endif //MSOS_TYPE_LINUX_KERNEL
623
624