Home
last modified time | relevance | path

Searched refs:_CLR_ (Results 1 – 25 of 41) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/fq/
H A DhalFQ.c167 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
175 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Stop()
186 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fig_config3), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fig_config… in HAL_FQ_Read_Enable()
197 …FQ16_W(Reg, _CLR_(_HAL_REG16_R(Reg), FIG_CFGB_READ_BURST_LEN_MASK) | (u16BurstLen << FIG_CFGB_READ… in HAL_FQ_BurstLen()
202 …FQ16_W(Reg, _CLR_(_HAL_REG16_R(Reg), FIQ_CFG0_BURST_LEN_MASK) | (u16BurstLen << FIQ_CFG0_BURST_LEN… in HAL_FQ_BurstLen()
209 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
220 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config1), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Bypass()
232 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config1), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_BypassFilein()
240 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_SWReset()
256 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_AddrMode()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/otv/
H A DhalOTV.c191 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL0, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][0… in HAL_OTV_Init()
195 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL3, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][0… in HAL_OTV_Init()
203 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL0, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][0…
221 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL3, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][…
239 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL2, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_PktTimerSrcFromPVR_Enable()
254 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL3, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_PktNumSrcFromPktDemux_Enable()
272 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL2, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_INT_Timer_Enable()
286 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL2, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_INT_Event_Enable()
384 …_HAL_OTV_REG16_W(&_OTVReg[0][0].OTV_INT_Flag, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[0][0].OTV_INT_Flag)… in HAL_OTV_INT_ClrEventHW()
387 …_HAL_OTV_REG16_W(&_OTVReg[0][0].OTV_INT_Flag, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[0][0].OTV_INT_Flag)… in HAL_OTV_INT_ClrEventHW()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/otv/
H A DhalOTV.c199 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL0, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][0… in HAL_OTV_Init()
203 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL3, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][0… in HAL_OTV_Init()
211 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL0, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][0…
229 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL3, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][…
247 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL2, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_PktTimerSrcFromPVR_Enable()
262 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL3, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_PktNumSrcFromPktDemux_Enable()
280 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL2, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_INT_Timer_Enable()
294 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL2, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_INT_Event_Enable()
392 …_HAL_OTV_REG16_W(&_OTVReg[0][0].OTV_INT_Flag, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[0][0].OTV_INT_Flag)… in HAL_OTV_INT_ClrEventHW()
395 …_HAL_OTV_REG16_W(&_OTVReg[0][0].OTV_INT_Flag, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[0][0].OTV_INT_Flag)… in HAL_OTV_INT_ClrEventHW()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/otv/
H A DhalOTV.c199 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL0, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][0… in HAL_OTV_Init()
203 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL3, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][0… in HAL_OTV_Init()
211 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL0, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][0…
229 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL3, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][…
247 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL2, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_PktTimerSrcFromPVR_Enable()
262 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL3, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_PktNumSrcFromPktDemux_Enable()
280 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL2, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_INT_Timer_Enable()
294 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL2, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_INT_Event_Enable()
392 …_HAL_OTV_REG16_W(&_OTVReg[0][0].OTV_INT_Flag, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[0][0].OTV_INT_Flag)… in HAL_OTV_INT_ClrEventHW()
395 …_HAL_OTV_REG16_W(&_OTVReg[0][0].OTV_INT_Flag, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[0][0].OTV_INT_Flag)… in HAL_OTV_INT_ClrEventHW()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/otv/
H A DhalOTV.c199 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL0, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][0… in HAL_OTV_Init()
203 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL3, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][0… in HAL_OTV_Init()
211 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL0, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][0…
229 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL3, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][…
247 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL2, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_PktTimerSrcFromPVR_Enable()
262 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL3, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_PktNumSrcFromPktDemux_Enable()
280 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL2, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_INT_Timer_Enable()
294 …_HAL_OTV_REG16_W(&_OTVReg[u32OTVEng][0].OTV_HW_CTRL2, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[u32OTVEng][… in HAL_OTV_INT_Event_Enable()
392 …_HAL_OTV_REG16_W(&_OTVReg[0][0].OTV_INT_Flag, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[0][0].OTV_INT_Flag)… in HAL_OTV_INT_ClrEventHW()
395 …_HAL_OTV_REG16_W(&_OTVReg[0][0].OTV_INT_Flag, _CLR_(_HAL_OTV_REG16_R(&_OTVReg[0][0].OTV_INT_Flag)… in HAL_OTV_INT_ClrEventHW()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/fq/
H A DhalFQ.c168 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
176 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Stop()
182 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
193 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_Bypass()
201 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_SWReset()
217 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_AddrMode()
224 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetRead()
232 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetWrite()
246 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_SkipRushData()
257 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_INT_Disable()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/fq/
H A DhalFQ.c167 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
175 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Stop()
181 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
192 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_Bypass()
200 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_SWReset()
216 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_AddrMode()
223 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetRead()
231 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetWrite()
245 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_SkipRushData()
256 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_INT_Disable()
[all …]
H A DhalFQ.h104 #define _CLR_(flag, bit) ((flag) & (~(bit))) macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/fq/
H A DhalFQ.c167 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
175 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Stop()
181 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
192 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_Bypass()
200 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_SWReset()
216 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_AddrMode()
223 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetRead()
231 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetWrite()
245 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_SkipRushData()
256 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_INT_Disable()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/fq/
H A DhalFQ.c190 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
198 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Stop()
204 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
215 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_Bypass()
223 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_SWReset()
239 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_AddrMode()
246 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetRead()
254 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetWrite()
268 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_SkipRushData()
279 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_INT_Disable()
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/fq/
H A DhalFQ.c181 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
189 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Stop()
195 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
206 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_Bypass()
214 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_SWReset()
230 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_AddrMode()
237 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetRead()
244 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetWrite()
257 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_SkipRushData()
268 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_INT_Disable()
[all …]
H A DhalFQ.h104 #define _CLR_(flag, bit) ((flag) & (~(bit))) macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/fq/
H A DhalFQ.c213 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in _HAL_FQ_PVR_Reset()
229 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Stop()
235 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
246 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_Bypass()
254 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_SWReset()
270 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_AddrMode()
277 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetRead()
284 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetWrite()
322 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi…
332 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi…
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/fq/
H A DhalFQ.c213 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in _HAL_FQ_PVR_Reset()
229 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Stop()
235 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
246 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_Bypass()
254 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_SWReset()
270 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_AddrMode()
277 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetRead()
284 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetWrite()
322 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi…
332 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi…
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/fq/
H A DhalFQ.c214 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in _HAL_FQ_PVR_Reset()
230 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Stop()
236 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
247 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_Bypass()
255 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_SWReset()
271 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_AddrMode()
278 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetRead()
285 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetWrite()
322 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi…
332 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi…
[all …]
H A DhalFQ.h104 #define _CLR_(flag, bit) ((flag) & (~(bit))) macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/fq/
H A DhalFQ.c214 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in _HAL_FQ_PVR_Reset()
230 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Stop()
236 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
247 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_Bypass()
255 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_SWReset()
271 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_AddrMode()
278 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetRead()
285 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_GetWrite()
322 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi…
332 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi…
[all …]
/utopia/UTPA2-700.0.x/modules/dmx/hal/macan/fq/
H A DhalFQ.c178 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Start()
186 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_PVR_Stop()
192 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_Rush_Enable()
203 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_Bypass()
211 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_SWReset()
227 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config0), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_config… in HAL_FQ_AddrMode()
253 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config11), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_SkipRushData()
264 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_INT_Disable()
274 …FQ16_W(&(_REGFIQ[u32FQEng].Reg_fiq_config16), _CLR_(_HAL_REG16_R(&(_REGFIQ[u32FQEng].Reg_fiq_confi… in HAL_FQ_INT_ClrHW()
H A DhalFQ.h104 #define _CLR_(flag, bit) ((flag) & (~(bit))) macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/multi_pvr/
H A DhalMultiPVR.c146 #define _CLR_(flag, bit) ((flag) & (~(bit))) macro
150 #define REG16_CLR(reg, value) REG16_W(reg, _CLR_(REG16_R(reg), value))
151 #define REG32_CLR(reg, value) REG32_W(reg, _CLR_(REG32_R(reg), value))
153 #define REG16_MSK_W(reg, mask, value) REG16_W((reg), _CLR_(REG16_R(reg), (mask)) | _AND_((value),…
154 #define REG32_MSK_W(reg, mask, value) REG32_W((reg), _CLR_(REG32_R(reg), (mask)) | _AND_((value),…
/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tsp/
H A DhalTSP.c109 #define _CLR_(flag, bit) ((flag) & (~(bit))) macro
113 #define REG16_CLR(reg, value) REG16_W(reg, _CLR_(REG16_R(reg), value))
114 #define REG32_CLR(reg, value) REG32_W(reg, _CLR_(REG32_R(reg), value))
116 #define REG16_MSK_W(reg, mask, value) REG16_W((reg), _CLR_(REG16_R(reg), (mask)) | _AND_((value)…
117 #define REG32_MSK_W(reg, mask, value) REG32_W((reg), _CLR_(REG32_R(reg), (mask)) | _AND_((value)…
5547 u16PktDmxSrc = _CLR_(REG16_R(&_RegCtrl->reg15b8), TSP_MATCH_PID_SRC_MASK); in HAL_DSCMB_GetStatus()
5572 REG16_W(&_RegCtrl->PVRConfig, _CLR_(REG16_R(&_RegCtrl->PVRConfig), TSP_MATCH_PID_LD)); // freeze in HAL_DSCMB_GetStatus()
5574 u16WordId = _CLR_(REG16_R(&_RegCtrl->PVRConfig), TSP_MATCH_PID_SEL_MASK); in HAL_DSCMB_GetStatus()
5750 REG16_W(PktConverterReg, _CLR_(REG16_R(PktConverterReg), TSP_PKT_FORCE_SYNC_47)); in HAL_TSP_PktConverter_ForceSync()
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tsp/
H A DhalTSP.c137 #define _CLR_(flag, bit) ((flag) & (~(bit))) macro
141 #define REG16_CLR(reg, value) REG16_W(reg, _CLR_(REG16_R(reg), value))
142 #define REG32_CLR(reg, value) REG32_W(reg, _CLR_(REG32_R(reg), value))
144 #define REG16_MSK_W(reg, mask, value) REG16_W((reg), _CLR_(REG16_R(reg), (mask)) | _AND_((value)…
145 #define REG32_MSK_W(reg, mask, value) REG32_W((reg), _CLR_(REG32_R(reg), (mask)) | _AND_((value)…
7020 u16PktDmxSrc = _CLR_(REG16_R(&_RegCtrl->reg15b8), TSP_MATCH_PID_SRC_MASK); in HAL_DSCMB_GetStatus()
7045 REG16_W(&_RegCtrl->PVRConfig, _CLR_(REG16_R(&_RegCtrl->PVRConfig), TSP_MATCH_PID_LD)); // freeze in HAL_DSCMB_GetStatus()
7047 u16WordId = _CLR_(REG16_R(&_RegCtrl->PVRConfig), TSP_MATCH_PID_SEL_MASK); in HAL_DSCMB_GetStatus()
7229 REG16_W(PktConverterReg, _CLR_(REG16_R(PktConverterReg), TSP_PKT_FORCE_SYNC_47)); in HAL_TSP_PktConverter_ForceSync()
7243 REG16_W(PktConverterReg, _CLR_(REG16_R(PktConverterReg), TSP_SRC_ID_FLT_EN)); in HAL_TSP_PktConverter_SrcIdFlt()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/
H A DhalTSP.c116 #define _CLR_(flag, bit) ((flag) & (~(bit))) macro
120 #define REG16_CLR(reg, value) REG16_W(reg, _CLR_(REG16_R(reg), value))
121 #define REG32_CLR(reg, value) REG32_W(reg, _CLR_(REG32_R(reg), value))
123 #define REG16_MSK_W(reg, mask, value) REG16_W((reg), _CLR_(REG16_R(reg), (mask)) | _AND_((value)…
124 #define REG32_MSK_W(reg, mask, value) REG32_W((reg), _CLR_(REG32_R(reg), (mask)) | _AND_((value)…
7218 u16PktDmxSrc = _CLR_(REG16_R(&_RegCtrl->reg15b8), TSP_MATCH_PID_SRC_MASK); in HAL_DSCMB_GetStatus()
7243 REG16_W(&_RegCtrl->PVRConfig, _CLR_(REG16_R(&_RegCtrl->PVRConfig), TSP_MATCH_PID_LD)); // freeze in HAL_DSCMB_GetStatus()
7245 u16WordId = _CLR_(REG16_R(&_RegCtrl->PVRConfig), TSP_MATCH_PID_SEL_MASK); in HAL_DSCMB_GetStatus()
7425 REG16_W(PktConverterReg, _CLR_(REG16_R(PktConverterReg), TSP_PKT_FORCE_SYNC_47)); in HAL_TSP_PktConverter_ForceSync()
7439 REG16_W(PktConverterReg, _CLR_(REG16_R(PktConverterReg), TSP_SRC_ID_FLT_EN)); in HAL_TSP_PktConverter_SrcIdFlt()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsp/
H A DhalTSP.c134 #define _CLR_(flag, bit) ((flag) & (~(bit))) macro
138 #define REG16_CLR(reg, value) REG16_W(reg, _CLR_(REG16_R(reg), value))
139 #define REG32_CLR(reg, value) REG32_W(reg, _CLR_(REG32_R(reg), value))
141 #define REG16_MSK_W(reg, mask, value) REG16_W((reg), _CLR_(REG16_R(reg), (mask)) | _AND_((value)…
142 #define REG32_MSK_W(reg, mask, value) REG32_W((reg), _CLR_(REG32_R(reg), (mask)) | _AND_((value)…
7567 u16PktDmxSrc = _CLR_(REG16_R(&_RegCtrl->reg15b8), TSP_MATCH_PID_SRC_MASK); in HAL_DSCMB_GetStatus()
7592 REG16_W(&_RegCtrl->PVRConfig, _CLR_(REG16_R(&_RegCtrl->PVRConfig), TSP_MATCH_PID_LD)); // freeze in HAL_DSCMB_GetStatus()
7594 u16WordId = _CLR_(REG16_R(&_RegCtrl->PVRConfig), TSP_MATCH_PID_SEL_MASK); in HAL_DSCMB_GetStatus()
7774 REG16_W(PktConverterReg, _CLR_(REG16_R(PktConverterReg), TSP_PKT_FORCE_SYNC_47)); in HAL_TSP_PktConverter_ForceSync()
7788 REG16_W(PktConverterReg, _CLR_(REG16_R(PktConverterReg), TSP_SRC_ID_FLT_EN)); in HAL_TSP_PktConverter_SrcIdFlt()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tsp/
H A DhalTSP.c117 #define _CLR_(flag, bit) ((flag) & (~(bit))) macro
121 #define REG16_CLR(reg, value) REG16_W(reg, _CLR_(REG16_R(reg), value))
122 #define REG32_CLR(reg, value) REG32_W(reg, _CLR_(REG32_R(reg), value))
124 #define REG16_MSK_W(reg, mask, value) REG16_W((reg), _CLR_(REG16_R(reg), (mask)) | _AND_((value)…
125 #define REG32_MSK_W(reg, mask, value) REG32_W((reg), _CLR_(REG32_R(reg), (mask)) | _AND_((value)…
5020 u16PktDmxSrc = _CLR_(REG16_R(&_RegCtrl->reg15b8), TSP_MATCH_PID_SRC_MASK); in HAL_DSCMB_GetStatus()
5054 REG16_W(&_RegCtrl->PVRConfig, _CLR_(REG16_R(&_RegCtrl->PVRConfig), TSP_MATCH_PID_LD)); // freeze in HAL_DSCMB_GetStatus()
5056 u16WordId = _CLR_(REG16_R(&_RegCtrl->PVRConfig), TSP_MATCH_PID_SEL_MASK); in HAL_DSCMB_GetStatus()

12