Searched refs:TSP_V3d_BLOCK_DIS (Results 1 – 13 of 13) sorted by relevance
473 #define TSP_V3d_BLOCK_DIS 0x00008000 macro
379 #define TSP_V3d_BLOCK_DIS 0x00008000 macro
3205 REG32_SET(&_RegCtrl->PVR2_Config, TSP_V3d_BLOCK_DIS); in HAL_TSP_FIFO_BlockDis()3225 REG32_CLR(&_RegCtrl->PVR2_Config, TSP_V3d_BLOCK_DIS); in HAL_TSP_FIFO_BlockDis()
414 #define TSP_V3d_BLOCK_DIS 0x00008000 macro
4179 REG32_SET(&_RegCtrl->PVR2_Config, TSP_V3d_BLOCK_DIS); in HAL_TSP_FIFO_BlockDis()4205 REG32_CLR(&_RegCtrl->PVR2_Config, TSP_V3d_BLOCK_DIS); in HAL_TSP_FIFO_BlockDis()
416 #define TSP_V3d_BLOCK_DIS 0x00008000 macro
448 #define TSP_V3d_BLOCK_DIS 0x00008000 macro
446 #define TSP_V3d_BLOCK_DIS 0x00008000 macro
450 #define TSP_V3d_BLOCK_DIS 0x00008000 macro
4660 REG32_SET(&_RegCtrl->PVR2_Config, TSP_V3d_BLOCK_DIS); in HAL_TSP_FIFO_BlockDis()4692 REG32_CLR(&_RegCtrl->PVR2_Config, TSP_V3d_BLOCK_DIS); in HAL_TSP_FIFO_BlockDis()
4365 REG32_SET(&_RegCtrl->PVR2_Config, TSP_V3d_BLOCK_DIS); in HAL_TSP_FIFO_BlockDis()4391 REG32_CLR(&_RegCtrl->PVR2_Config, TSP_V3d_BLOCK_DIS); in HAL_TSP_FIFO_BlockDis()