Searched refs:REG_MISC_CONFIG_21 (Results 1 – 12 of 12) sorted by relevance
346 #define REG_MISC_CONFIG_21 0x21U macro
356 #define REG_MISC_CONFIG_21 0x21U macro
2989 …dPixel_Clk = (double) ( (double)(MHal_HDMITx_Read(HDMITX_MISC_REG_BASE, REG_MISC_CONFIG_21) << 1) … in MHal_HDMITx_EnableSSC()
2974 …dPixel_Clk = (double) ( (double)(MHal_HDMITx_Read(HDMITX_MISC_REG_BASE, REG_MISC_CONFIG_21) << 1) … in MHal_HDMITx_EnableSSC()
3081 dPixel_Clk = ((MHal_HDMITx_Read(HDMITX_MISC_REG_BASE, REG_MISC_CONFIG_21) << 1) * 12 / 128); in MHal_HDMITx_EnableSSC()
3043 dPixel_Clk = ((MHal_HDMITx_Read(HDMITX_MISC_REG_BASE, REG_MISC_CONFIG_21) << 1) * 12 / 128); in MHal_HDMITx_EnableSSC()
3362 …dPixel_Clk = (double) ( (double)(MHal_HDMITx_Read(HDMITX_MISC_REG_BASE, REG_MISC_CONFIG_21) << 1) … in MHal_HDMITx_EnableSSC()
3482 dPixel_Clk = ((MHal_HDMITx_Read(HDMITX_MISC_REG_BASE, REG_MISC_CONFIG_21) << 1) * 12 / 128); in MHal_HDMITx_EnableSSC()