Searched refs:REG_HDCP_TX_MI_0C (Results 1 – 12 of 12) sorted by relevance
382 #define REG_HDCP_TX_MI_0C 0x0CU // Mi[63:0] : 6C[7:0] ~ 6F[15:8] macro
392 #define REG_HDCP_TX_MI_0C 0x0CU // Mi[63:0] : 6C[7:0] ~ 6F[15:8] macro
760 return (MHal_HDMITx_Read(HDMITX_HDCP_REG_BASE, REG_HDCP_TX_MI_0C + idx)); in MHal_HDMITX_GetM02Bytes()
787 return (MHal_HDMITx_Read(HDMITX_HDCP_REG_BASE, REG_HDCP_TX_MI_0C + idx)); in MHal_HDMITX_GetM02Bytes()
809 return (MHal_HDMITx_Read(HDMITX_HDCP_REG_BASE, REG_HDCP_TX_MI_0C + idx)); in MHal_HDMITX_GetM02Bytes()
797 return (MHal_HDMITx_Read(HDMITX_HDCP_REG_BASE, REG_HDCP_TX_MI_0C + idx)); in MHal_HDMITX_GetM02Bytes()
931 return (MHal_HDMITx_Read(HDMITX_HDCP_REG_BASE, REG_HDCP_TX_MI_0C + idx)); in MHal_HDMITX_GetM02Bytes()
986 return (MHal_HDMITx_Read(HDMITX_HDCP_REG_BASE, REG_HDCP_TX_MI_0C + idx)); in MHal_HDMITX_GetM02Bytes()