Home
last modified time | relevance | path

Searched refs:MIU2_REG_SEL2 (Results 1 – 20 of 20) sorted by relevance

/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/macan/vpu_v3/
H A DregVPU_EX.h434 #define MIU2_REG_SEL2 (MIU2_REG_HVD_BASE+(( 0x007A)<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/manhattan/vpu_v3/
H A DregVPU_EX.h442 #define MIU2_REG_SEL2 (MIU2_REG_HVD_BASE+(( 0x007A)<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/messi/vpu_v3/
H A DregVPU_EX.h442 #define MIU2_REG_SEL2 (MIU2_REG_HVD_BASE+(( 0x007A)<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mainz/vpu_v3/
H A DregVPU_EX.h442 #define MIU2_REG_SEL2 (MIU2_REG_HVD_BASE+(( 0x007A)<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7821/vpu_v3/
H A DregVPU_EX.h462 #define MIU2_REG_SEL2 (MIU2_REG_HVD_BASE+(( 0x007A)<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maserati/vpu_v3/
H A DregVPU_EX.h462 #define MIU2_REG_SEL2 (MIU2_REG_HVD_BASE+(( 0x007A)<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_lite/hal/kano/vpu_lite/
H A DregVPU_EX.h460 #define MIU2_REG_SEL2 (MIU2_REG_HVD_BASE+(( 0x007A)<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/messi/hvd_v3/
H A DregHVD_EX.h651 #define MIU2_REG_SEL2 (MIU2_REG_HVD_BASE+(( 0x007A)<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7821/hvd_v3/
H A DregHVD_EX.h652 #define MIU2_REG_SEL2 (MIU2_REG_HVD_BASE+(( 0x007A)<<1)) macro
H A DhalHVD_EX.c238 … (((_HVD_Read2Byte(MIU0_REG_SEL2) & BIT(4)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL2) & BIT(4)) == …
245 …HVD_Read2Byte(MIU0_REG_SEL2) & BIT(4)) == BIT(4)) && ((_HVD_Read2Byte(MIU2_REG_SEL2) & BIT(4)) == …
252 … (((_HVD_Read2Byte(MIU0_REG_SEL2) & BIT(4)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL2) & BIT(4)) == …
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/manhattan/hvd_v3/
H A DregHVD_EX.h652 #define MIU2_REG_SEL2 (MIU2_REG_HVD_BASE+(( 0x007A)<<1)) macro
H A DhalHVD_EX.c238 … (((_HVD_Read2Byte(MIU0_REG_SEL2) & BIT(4)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL2) & BIT(4)) == …
245 …HVD_Read2Byte(MIU0_REG_SEL2) & BIT(4)) == BIT(4)) && ((_HVD_Read2Byte(MIU2_REG_SEL2) & BIT(4)) == …
252 … (((_HVD_Read2Byte(MIU0_REG_SEL2) & BIT(4)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL2) & BIT(4)) == …
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/macan/hvd_v3/
H A DregHVD_EX.h653 #define MIU2_REG_SEL2 (MIU2_REG_HVD_BASE+(( 0x007A)<<1)) macro
H A DhalHVD_EX.c224 … (((_HVD_Read2Byte(MIU0_REG_SEL2) & BIT(4)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL2) & BIT(4)) == …
231 …HVD_Read2Byte(MIU0_REG_SEL2) & BIT(4)) == BIT(4)) && ((_HVD_Read2Byte(MIU2_REG_SEL2) & BIT(4)) == …
238 … (((_HVD_Read2Byte(MIU0_REG_SEL2) & BIT(4)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL2) & BIT(4)) == …
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mainz/hvd_v3/
H A DregHVD_EX.h651 #define MIU2_REG_SEL2 (MIU2_REG_HVD_BASE+(( 0x007A)<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maserati/hvd_v3/
H A DregHVD_EX.h652 #define MIU2_REG_SEL2 (MIU2_REG_HVD_BASE+(( 0x007A)<<1)) macro
H A DhalHVD_EX.c239 … (((_HVD_Read2Byte(MIU0_REG_SEL2) & BIT(4)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL2) & BIT(4)) == …
246 …HVD_Read2Byte(MIU0_REG_SEL2) & BIT(4)) == BIT(4)) && ((_HVD_Read2Byte(MIU2_REG_SEL2) & BIT(4)) == …
253 … (((_HVD_Read2Byte(MIU0_REG_SEL2) & BIT(4)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL2) & BIT(4)) == …
/utopia/UTPA2-700.0.x/modules/vdec_lite/hal/kano/hvd_lite/
H A DregHVD_EX.h695 #define MIU2_REG_SEL2 (MIU2_REG_HVD_BASE+(( 0x007A)<<1)) macro
H A DhalHVD_EX.c234 …(((_HVD_Read2Byte(MIU0_REG_SEL2) & BIT(6)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL2) & BIT(6)) == …
241 …D_Read2Byte(MIU0_REG_SEL2) & BIT(6)) == BIT(6)) && ((_HVD_Read2Byte(MIU2_REG_SEL2) & BIT(6)) == …
248 …(((_HVD_Read2Byte(MIU0_REG_SEL2) & BIT(6)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL2) & BIT(6)) == …
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mooney/hvd_v3/
H A DregHVD_EX.h677 #define MIU2_REG_SEL2 (MIU2_REG_HVD_BASE+(( 0x007A)<<1)) macro