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Searched refs:CHIPTOP_REG_BASE (Results 1 – 25 of 72) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/dac/hal/curry/dac/include/
H A DhalDAC.h120 #define CHIPTOP_REG_BASE (0x101E00) macro
167 #define L_BK_CHIPTOP_TOP(x) BK_REG_L(CHIPTOP_REG_BASE, x)
168 #define H_BK_CHIPTOP_TOP(x) BK_REG_H(CHIPTOP_REG_BASE, x)
/utopia/UTPA2-700.0.x/modules/dac/hal/kano/dac/include/
H A DhalDAC.h120 #define CHIPTOP_REG_BASE (0x101E00) macro
171 #define L_BK_CHIPTOP_TOP(x) BK_REG_L(CHIPTOP_REG_BASE, x)
172 #define H_BK_CHIPTOP_TOP(x) BK_REG_H(CHIPTOP_REG_BASE, x)
/utopia/UTPA2-700.0.x/modules/dac/hal/k6lite/dac/include/
H A DhalDAC.h120 #define CHIPTOP_REG_BASE (0x101E00) macro
171 #define L_BK_CHIPTOP_TOP(x) BK_REG_L(CHIPTOP_REG_BASE, x)
172 #define H_BK_CHIPTOP_TOP(x) BK_REG_H(CHIPTOP_REG_BASE, x)
/utopia/UTPA2-700.0.x/modules/dac/hal/k6/dac/include/
H A DhalDAC.h120 #define CHIPTOP_REG_BASE (0x101E00) macro
171 #define L_BK_CHIPTOP_TOP(x) BK_REG_L(CHIPTOP_REG_BASE, x)
172 #define H_BK_CHIPTOP_TOP(x) BK_REG_H(CHIPTOP_REG_BASE, x)
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/maserati/hvd/
H A DregHVD.h318 #define CHIPTOP_REG_BASE (0x1E00 ) macro
321 #define REG_TOP_PSRAM0_1_MIUMUX (CHIPTOP_REG_BASE+(0x002D<<1)) //TODO
413 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/manhattan/hvd/
H A DregHVD.h318 #define CHIPTOP_REG_BASE (0x1E00 ) macro
321 #define REG_TOP_PSRAM0_1_MIUMUX (CHIPTOP_REG_BASE+(0x002D<<1)) //TODO
413 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/macan/hvd/
H A DregHVD.h318 #define CHIPTOP_REG_BASE (0x1E00 ) macro
321 #define REG_TOP_PSRAM0_1_MIUMUX (CHIPTOP_REG_BASE+(0x002D<<1)) //TODO
413 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/M7821/hvd/
H A DregHVD.h318 #define CHIPTOP_REG_BASE (0x1E00 ) macro
321 #define REG_TOP_PSRAM0_1_MIUMUX (CHIPTOP_REG_BASE+(0x002D<<1)) //TODO
413 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/maxim/hvd/
H A DregHVD.h318 #define CHIPTOP_REG_BASE (0x1E00 ) macro
321 #define REG_TOP_PSRAM0_1_MIUMUX (CHIPTOP_REG_BASE+(0x002D<<1)) //TODO
413 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/M7621/hvd/
H A DregHVD.h318 #define CHIPTOP_REG_BASE (0x1E00 ) macro
321 #define REG_TOP_PSRAM0_1_MIUMUX (CHIPTOP_REG_BASE+(0x002D<<1)) //TODO
413 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/mustang/hvd_ex/
H A DregHVD_EX.h400 #define CHIPTOP_REG_BASE (0x1E00 ) macro
403 #define REG_TOP_PSRAM0_1_MIUMUX (CHIPTOP_REG_BASE+(0x002D<<1)) //TODO
511 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maldives/hvd_ex/
H A DregHVD_EX.h400 #define CHIPTOP_REG_BASE (0x1E00 ) macro
403 #define REG_TOP_PSRAM0_1_MIUMUX (CHIPTOP_REG_BASE+(0x002D<<1)) //TODO
511 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/M7621/hvd_ex/
H A DregHVD_EX.h389 #define CHIPTOP_REG_BASE (0x1E00 ) macro
392 #define REG_TOP_PSRAM0_1_MIUMUX (CHIPTOP_REG_BASE+(0x002D<<1)) //TODO
533 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/messi/hvd_ex/
H A DregHVD_EX.h389 #define CHIPTOP_REG_BASE (0x1E00 ) macro
392 #define REG_TOP_PSRAM0_1_MIUMUX (CHIPTOP_REG_BASE+(0x002D<<1)) //TODO
533 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/manhattan/hvd_ex/
H A DregHVD_EX.h389 #define CHIPTOP_REG_BASE (0x1E00 ) macro
392 #define REG_TOP_PSRAM0_1_MIUMUX (CHIPTOP_REG_BASE+(0x002D<<1)) //TODO
533 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maldives/hvd_v3/
H A DregHVD_EX.h408 #define CHIPTOP_REG_BASE (0x1E00 ) macro
411 #define REG_TOP_PSRAM0_1_MIUMUX (CHIPTOP_REG_BASE+(0x002D<<1)) //TODO
515 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maxim/hvd_ex/
H A DregHVD_EX.h389 #define CHIPTOP_REG_BASE (0x1E00 ) macro
392 #define REG_TOP_PSRAM0_1_MIUMUX (CHIPTOP_REG_BASE+(0x002D<<1)) //TODO
533 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/mainz/hvd_ex/
H A DregHVD_EX.h389 #define CHIPTOP_REG_BASE (0x1E00 ) macro
392 #define REG_TOP_PSRAM0_1_MIUMUX (CHIPTOP_REG_BASE+(0x002D<<1)) //TODO
533 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mustang/hvd_v3/
H A DregHVD_EX.h412 #define CHIPTOP_REG_BASE (0x1E00 ) macro
415 #define REG_TOP_PSRAM0_1_MIUMUX (CHIPTOP_REG_BASE+(0x002D<<1)) //TODO
520 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maserati/hvd_ex/
H A DregHVD_EX.h389 #define CHIPTOP_REG_BASE (0x1E00 ) macro
392 #define REG_TOP_PSRAM0_1_MIUMUX (CHIPTOP_REG_BASE+(0x002D<<1)) //TODO
533 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/M7821/hvd_ex/
H A DregHVD_EX.h389 #define CHIPTOP_REG_BASE (0x1E00 ) macro
392 #define REG_TOP_PSRAM0_1_MIUMUX (CHIPTOP_REG_BASE+(0x002D<<1)) //TODO
533 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/macan/hvd_ex/
H A DregHVD_EX.h389 #define CHIPTOP_REG_BASE (0x1E00 ) macro
392 #define REG_TOP_PSRAM0_1_MIUMUX (CHIPTOP_REG_BASE+(0x002D<<1)) //TODO
533 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/messi/hvd_v3/
H A DregHVD_EX.h431 #define CHIPTOP_REG_BASE (0x1E00 ) macro
434 #define REG_TOP_PSRAM0_1_MIUMUX (CHIPTOP_REG_BASE+(0x002D<<1)) //TODO
578 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7821/hvd_v3/
H A DregHVD_EX.h432 #define CHIPTOP_REG_BASE (0x1E00 ) macro
435 #define REG_TOP_PSRAM0_1_MIUMUX (CHIPTOP_REG_BASE+(0x002D<<1)) //TODO
579 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1))
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7621/hvd_v3/
H A DregHVD_EX.h448 #define CHIPTOP_REG_BASE (0x1E00 ) macro
451 #define REG_TOP_PSRAM0_1_MIUMUX (CHIPTOP_REG_BASE+(0x002D<<1)) //TODO
595 #define REG_TOP_UART_SEL0 (CHIPTOP_REG_BASE+(0x0053<<1))

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