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Searched refs:pci (Results 1 – 25 of 124) sorted by relevance

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/rk3399_rockchip-uboot/arch/m68k/cpu/mcf5445x/
H A Dpci.c47 pci_t *pci = (pci_t *)MMAP_PCI; in pci_mcf5445x_init() local
63 setbits_be32(&pci->gscr, PCI_GSCR_PR); in pci_mcf5445x_init()
65 setbits_be32(&pci->tcr1, PCI_TCR1_P); in pci_mcf5445x_init()
68 out_be32(&pci->iw0btar, in pci_mcf5445x_init()
70 out_be32(&pci->iw1btar, in pci_mcf5445x_init()
72 out_be32(&pci->iw2btar, in pci_mcf5445x_init()
75 out_be32(&pci->iwcr, in pci_mcf5445x_init()
79 out_be32(&pci->icr, 0); in pci_mcf5445x_init()
82 out_be32(&pci->scr, PCI_SCR_B | PCI_SCR_M); in pci_mcf5445x_init()
85 out_be32(&pci->cr1, PCI_CR1_CLS(8) | PCI_CR1_LTMR(0xF8)); in pci_mcf5445x_init()
[all …]
/rk3399_rockchip-uboot/arch/m68k/cpu/mcf547x_8x/
H A Dpci.c75 pci_t *pci = (pci_t *) MMAP_PCI; in pci_mcf547x_8x_init() local
89 setbits_be32(&pci->gscr, PCI_GSCR_PR); in pci_mcf547x_8x_init()
91 out_be32(&pci->tcr1, PCI_TCR1_P); in pci_mcf547x_8x_init()
94 out_be32(&pci->iw0btar, in pci_mcf547x_8x_init()
96 out_be32(&pci->iw1btar, in pci_mcf547x_8x_init()
98 out_be32(&pci->iw2btar, in pci_mcf547x_8x_init()
101 out_be32(&pci->iwcr, in pci_mcf547x_8x_init()
105 out_be32(&pci->icr, 0); in pci_mcf547x_8x_init()
108 out_be32(&pci->scr, PCI_SCR_B | PCI_SCR_M); in pci_mcf547x_8x_init()
111 out_be32(&pci->cr1, PCI_CR1_CLS(8) | PCI_CR1_LTMR(0xf8)); in pci_mcf547x_8x_init()
[all …]
/rk3399_rockchip-uboot/tools/patman/test/
H A D0001-pci-Correct-cast-for-sandbox.patch4 Subject: [RFC 1/2] pci: Correct cast for sandbox
11 cmd/pci.c:152:11: warning: format ‘%llx’ expects argument of type
29 cmd/pci.c | 3 ++-
32 diff --git a/cmd/pci.c b/cmd/pci.c
34 --- a/cmd/pci.c
35 +++ b/cmd/pci.c
H A D0000-cover-letter.patch12 pci: Correct cast for sandbox
15 cmd/pci.c | 3 ++-
/rk3399_rockchip-uboot/drivers/pci/
H A Dfsl_pci_init.c74 volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) addr; in fsl_setup_hose() local
79 pci_setup_indirect(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data); in fsl_setup_hose()
312 volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *)cfg_addr; in fsl_pci_init() local
317 volatile pot_t *po = &pci->pot[1]; /* skip 0 */ in fsl_pci_init()
325 block_rev = in_be32(&pci->block_rev1); in fsl_pci_init()
327 pi = &pci->pit[2]; /* 0xDC0 */ in fsl_pci_init()
329 pi = &pci->pit[3]; /* 0xDE0 */ in fsl_pci_init()
422 out_be32(&pci->pedr, 0xffffffff); /* Clear any errors */ in fsl_pci_init()
423 out_be32(&pci->peer, ~0x20140); /* Enable All Error Interrupts except in fsl_pci_init()
444 ltssm = (in_be32(&pci->pex_csr0) in fsl_pci_init()
[all …]
H A Dpcie_dw_rockchip.c375 static void rk_pcie_configure(struct rk_pcie *pci, u32 cap_speed, u32 cap_lanes) in rk_pcie_configure() argument
379 rk_pcie_dbi_write_enable(pci, true); in rk_pcie_configure()
381 val = readl(pci->dbi_base + PCIE_LINK_CAPABILITY); in rk_pcie_configure()
384 writel(val, pci->dbi_base + PCIE_LINK_CAPABILITY); in rk_pcie_configure()
386 val = readl(pci->dbi_base + PCIE_LINK_CTL_2); in rk_pcie_configure()
389 writel(val, pci->dbi_base + PCIE_LINK_CTL_2); in rk_pcie_configure()
391 val = readl(pci->dbi_base + PCIE_PORT_LINK_CONTROL); in rk_pcie_configure()
410 dev_err(pci->dev, "cap_lanes %u: invalid value\n", cap_lanes); in rk_pcie_configure()
413 writel(val, pci->dbi_base + PCIE_PORT_LINK_CONTROL); in rk_pcie_configure()
416 val = readl(pci->dbi_base + PCIE_LINK_WIDTH_SPEED_CONTROL); in rk_pcie_configure()
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H A DMakefile10 obj-$(CONFIG_PCI) += pci-uclass.o pci_auto.o
13 obj-$(CONFIG_SANDBOX) += pci-emul-uclass.o
16 obj-$(CONFIG_PCI) += pci.o pci_auto_old.o
/rk3399_rockchip-uboot/doc/driver-model/
H A Dpci-info.txt14 pci0 = &pci;
17 pci: pci-controller {
18 compatible = "sandbox,pci";
46 pci {
49 compatible = "pci-x86";
58 compatible = "pci-bridge";
65 compatible = "pci-bridge";
88 In this example, the root PCI bus node is the "/pci" which matches "pci-x86"
89 driver. It has a subnode "pcie@17,0" with driver "pci-bridge". "pcie@17,0"
90 also has subnode "topcliff@0,0" which is a "pci-bridge" too. Under that bridge,
[all …]
/rk3399_rockchip-uboot/arch/arm/dts/
H A Dtegra186-p2771-0000-500.dts17 pci@1,0 {
22 pci@2,0 {
27 pci@3,0 {
H A Dtegra186-p2771-0000-000.dts17 pci@1,0 {
22 pci@2,0 {
27 pci@3,0 {
H A Darmada-xp-mv78460.dtsi110 device_type = "pci";
154 device_type = "pci";
171 device_type = "pci";
188 device_type = "pci";
205 device_type = "pci";
222 device_type = "pci";
239 device_type = "pci";
256 device_type = "pci";
273 device_type = "pci";
290 device_type = "pci";
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H A Darmada-xp-mv78260.dtsi93 device_type = "pci";
133 device_type = "pci";
150 device_type = "pci";
167 device_type = "pci";
184 device_type = "pci";
201 device_type = "pci";
218 device_type = "pci";
235 device_type = "pci";
252 device_type = "pci";
269 device_type = "pci";
/rk3399_rockchip-uboot/arch/mips/dts/
H A Dimg,boston.dts47 pci0: pci@10000000 {
50 device_type = "pci";
76 pci1: pci@12000000 {
79 device_type = "pci";
105 pci2: pci@14000000 {
107 device_type = "pci";
/rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra210/
H A Dxusb-padctl.c82 TEGRA210_LANE("pcie-0", 0x028, 12, 0x3, 1, pci),
83 TEGRA210_LANE("pcie-1", 0x028, 14, 0x3, 2, pci),
84 TEGRA210_LANE("pcie-2", 0x028, 16, 0x3, 3, pci),
85 TEGRA210_LANE("pcie-3", 0x028, 18, 0x3, 4, pci),
86 TEGRA210_LANE("pcie-4", 0x028, 20, 0x3, 5, pci),
87 TEGRA210_LANE("pcie-5", 0x028, 22, 0x3, 6, pci),
88 TEGRA210_LANE("pcie-6", 0x028, 24, 0x3, 7, pci),
89 TEGRA210_LANE("sata-0", 0x028, 30, 0x3, 8, pci),
/rk3399_rockchip-uboot/arch/x86/dts/
H A Dqemu-x86_i440fx.dts47 pci {
48 compatible = "pci-x86";
64 intel,pirq-config = "pci";
H A Dbroadwell_som-6896.dts25 pci {
26 compatible = "pci-x86";
H A Dqemu-x86_q35.dts58 pci {
59 compatible = "pci-x86";
75 intel,pirq-config = "pci";
H A Dcrownbay.dts67 pci {
70 compatible = "pci-x86";
79 compatible = "pci-bridge";
86 compatible = "pci-bridge";
156 intel,pirq-config = "pci";
/rk3399_rockchip-uboot/arch/sandbox/dts/
H A Dsandbox.dts13 pci0 = &pci;
141 pci: pci-controller { label
142 compatible = "sandbox,pci";
143 device_type = "pci";
148 pci@1f,0 {
149 compatible = "pci-generic";
/rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra124/
H A Dxusb-padctl.c101 TEGRA124_LANE("pcie-0", 0x134, 16, 0x3, 1, pci),
102 TEGRA124_LANE("pcie-1", 0x134, 18, 0x3, 2, pci),
103 TEGRA124_LANE("pcie-2", 0x134, 20, 0x3, 3, pci),
104 TEGRA124_LANE("pcie-3", 0x134, 22, 0x3, 4, pci),
105 TEGRA124_LANE("pcie-4", 0x134, 24, 0x3, 5, pci),
106 TEGRA124_LANE("sata-0", 0x134, 26, 0x3, 6, pci),
/rk3399_rockchip-uboot/drivers/usb/host/
H A DMakefile21 obj-$(CONFIG_USB_OHCI_PCI) += ohci-pci.o
40 obj-$(CONFIG_USB_EHCI_PCI) += ehci-pci.o
56 obj-$(CONFIG_USB_XHCI_PCI) += xhci-pci.o
/rk3399_rockchip-uboot/board/freescale/mpc8349itx/
H A DMakefile8 obj-$(CONFIG_PCI) += pci.o
/rk3399_rockchip-uboot/board/freescale/mpc837xerdb/
H A DMakefile9 obj-$(CONFIG_PCI) += pci.o
/rk3399_rockchip-uboot/board/freescale/mpc837xemds/
H A DMakefile9 obj-$(CONFIG_PCI) += pci.o
/rk3399_rockchip-uboot/board/freescale/mpc832xemds/
H A DMakefile9 obj-$(CONFIG_PCI) += pci.o

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