treewide: replace with error() with pr_err()

U-Boot widely uses error() as a bit noisier variant of printf().

This macro causes name conflict with the following line in
include/linux/compiler-gcc.h

treewide: replace with error() with pr_err()

U-Boot widely uses error() as a bit noisier variant of printf().

This macro causes name conflict with the following line in
include/linux/compiler-gcc.h:

# define __compiletime_error(message) __attribute__((error(message)))

This prevents us from using __compiletime_error(), and makes it
difficult to fully sync BUILD_BUG macros with Linux. (Notice
Linux's BUILD_BUG_ON_MSG is implemented by using compiletime_assert().)

Let's convert error() into now treewide-available pr_err().

Done with the help of Coccinelle, excluing tools/ directory.

The semantic patch I used is as follows:

// <smpl>
@@@@
-error
+pr_err
(...)
// </smpl>

Change-Id: I921807c1770d36a91e692c48ab477558bb2ed0b8
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Re-run Coccinelle]
Signed-off-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
(cherry picked from commit 9b643e312d528f291966c1f30b0d90bf3b1d43dc)

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dm: tegra: Convert USB setup to livetree

Adjust this code to support a live device tree. This should be implemented
as a PHY driver but that is left as an exercise for the maintainer.

Signed-off-by

dm: tegra: Convert USB setup to livetree

Adjust this code to support a live device tree. This should be implemented
as a PHY driver but that is left as an exercise for the maintainer.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>

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Merge branch 'master' of git://git.denx.de/u-boot-tegra

ARM: tegra: error check Tegra210 XUSB padctl waits

Add code to detect timeouts when waiting for HW events such as PLL
lock done. Any errors are logged and trigger an error return code.

Signed-off-b

ARM: tegra: error check Tegra210 XUSB padctl waits

Add code to detect timeouts when waiting for HW events such as PLL
lock done. Any errors are logged and trigger an error return code.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>

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ARM: tegra: add lane tables to Tegra210 XUSB padctl

Add the tables defining which pads and mux options exist in the Tegra210
XUSB padctl hardware.

Signed-off-by: Stephen Warren <swarren@nvidia.com>

ARM: tegra: add lane tables to Tegra210 XUSB padctl

Add the tables defining which pads and mux options exist in the Tegra210
XUSB padctl hardware.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>

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ARM: tegra: switch Tegra210 to common XUSB padctl

This change simply deletes code from the Tegra210 XUSB padctl driver that
is already present in the common XUSB padctl code. Since all the arrays
in

ARM: tegra: switch Tegra210 to common XUSB padctl

This change simply deletes code from the Tegra210 XUSB padctl driver that
is already present in the common XUSB padctl code. Since all the arrays
in tegra210_socdata are empty, this update may leave the Tegra210 XUSB
padctl driver non-functional at run-time. However, (a) this driver is not
used yet so no regression can be observed and (b) the next commit will
immediately fix this up.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>

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Merge branch 'master' of git://git.denx.de/u-boot-tegra

ARM: Tegra210: Add SoC code/include files for T210

All based off of Tegra124. As a Tegra210 board is brought
up, these may change a bit to match the HW more closely,
but probably 90% of this is iden

ARM: Tegra210: Add SoC code/include files for T210

All based off of Tegra124. As a Tegra210 board is brought
up, these may change a bit to match the HW more closely,
but probably 90% of this is identical to T124.

Note that since T210 is a 64-bit build, it has no SPL
component, and hence no cpu.c for Tegra210.

Signed-off-by: Tom Warren <twarren@nvidia.com>

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