Home
last modified time | relevance | path

Searched refs:up (Results 1 – 25 of 97) sorted by relevance

1234

/rk3399_ARM-atf/docs/plat/
H A Dmt8196.rst7 Cortex-A720 can operate at up to 2.1 GHz.
8 Cortex-X4 can operate at up to 2.8 GHz.
9 Cortex-X925 can operate at up to 3.6 GHz.
H A Dmt8189.rst7 Cortex-A55 can operate at up to 2.0 GHz.
8 Cortex-A78 can operate at up to 3.0 GHz.
H A Dmt8186.rst6 Cortex-A76 can operate at up to 2.05 GHz.
7 Cortex-A55 can operate at up to 2.0 GHz.
H A Dmt8192.rst6 Cortex-A76 can operate at up to 2.2 GHz.
7 Cortex-A55 can operate at up to 2 GHz.
H A Dmt8195.rst6 Cortex-A78 can operate at up to 2.6 GHz.
7 Cortex-A55 can operate at up to 2.0 GHz.
H A Dmt8188.rst6 Cortex-A78 can operate at up to 2.6 GHz.
7 Cortex-A55 can operate at up to 2.0 GHz.
H A Dmt8183.rst6 Both clusters can operate at up to 2 GHz.
/rk3399_ARM-atf/docs/resources/diagrams/plantuml/
H A Dio_arm_class_diagram.puml46 FIP_IMAGE_ID -up-|> plat_io_policy
47 BL2_IMAGE_ID -up-|> plat_io_policy
48 xxx_IMAGE_ID -up-|> plat_io_policy
H A Dfip-secure-partitions.puml141 config.json .up.> SP_vendor_1
142 config.json .up.> SP_vendor_2
/rk3399_ARM-atf/fdts/
H A Dstm32mp13-pinctrl.dtsi54 bias-pull-up;
64 bias-pull-up;
94 bias-pull-up;
108 bias-pull-up;
H A Dstm32mp15-pinctrl.dtsi31 bias-pull-up;
86 bias-pull-up;
96 bias-pull-up;
130 bias-pull-up;
134 bias-pull-up;
146 bias-pull-up;
150 bias-pull-up;
164 bias-pull-up;
170 bias-pull-up;
203 bias-pull-up;
[all …]
H A Dstm32mp25-pinctrl.dtsi70 bias-pull-up;
76 bias-pull-up;
89 bias-pull-up;
H A Dstm32mp151a-prtt1a.dts63 bias-pull-up;
204 bias-pull-up;
207 bias-pull-up;
257 bias-pull-up;
H A Dstm32mp157c-lxa-mc1.dts68 bias-pull-up;
72 bias-pull-up;
H A Dfvp-base-gicv2-psci.dts7 /* Configuration: max 4 clusters with up to 4 CPUs */
H A Dfvp-base-gicv3-psci.dts7 /* Configuration: max 4 clusters with up to 4 CPUs */
H A Dfvp-base-gicv3-psci-1t.dts7 /* Configuration: max 4 clusters with up to 4 CPUs with 1 thread per each */
H A Dfvp-base-gicv3-psci-dynamiq.dts7 /* DynamIQ configuration: 1 cluster with up to 8 CPUs */
H A Dfvp-base-gicv3-psci-dynamiq-2t.dts7 /* DynamIQ configuration: 1 cluster with up to 8 CPUs with 2 threads per each */
H A Dstm32mp15xx-dhcom-som.dtsi330 * SD bus pull-up resistors:
335 bias-pull-up;
338 bias-pull-up;
/rk3399_ARM-atf/plat/nxp/common/fip_handler/fuse_fip/
H A Dfuse.mk48 FUSE_FIP_ARGS += --fuse-up ${BUILD_PLAT}/${FUSE_UP_FILE_SB}
51 FUSE_FIP_ARGS += --fuse-up ${FUSE_UP_FILE}
/rk3399_ARM-atf/docs/plat/nxp/
H A Dindex.rst13 It includes details on image flashing, fuse provisioning and trusted board boot-up.
/rk3399_ARM-atf/drivers/renesas/common/ddr/ddr_b/
H A Dboot_init_dram_config.c1890 uint32_t dataL, down, up; in opencheck_SSI_WS6() local
1924 up = (mmio_read_32(GPIO_INDT6) >> 15) & 0x1; in opencheck_SSI_WS6()
1932 if (down == up) { in opencheck_SSI_WS6()
/rk3399_ARM-atf/docs/process/
H A Dfaq.rst33 bug-fixes but may wait up to a week to merge major changes, or ones requiring
50 several things over the course of a few days, it might take up to a week.
58 1-2 days later. This whole process could take up 4 weeks. Please refer to the
/rk3399_ARM-atf/docs/components/
H A Dactivity-monitors.rst10 sets up the |AMU| prior to its exit from EL3, and will save and restore

1234