Merge "feat(st): update STM32MP DT files" into integration

feat(st): update STM32MP DT files

This is an alignment with Linux DT files that have been merged in
stm32 tree [1], and will be in Linux 6.7.
The /omit-if-no-ref/ in overlay files are now removed, a

feat(st): update STM32MP DT files

This is an alignment with Linux DT files that have been merged in
stm32 tree [1], and will be in Linux 6.7.
The /omit-if-no-ref/ in overlay files are now removed, as already in
pinctrl files.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32.git

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: Iab94b0ba7a4a0288ca53d1ae57ab590566967415

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Merge changes from topic "st-fixes" into integration

* changes:
fix(spi-nand): add Quad Enable management
fix(st-clock): disabling CKPER clock is not functional on stm32mp13
fix(st-uart): skip

Merge changes from topic "st-fixes" into integration

* changes:
fix(spi-nand): add Quad Enable management
fix(st-clock): disabling CKPER clock is not functional on stm32mp13
fix(st-uart): skip console flush if UART is disabled
fix(st): flush UART at the end of uart_read()
fix(stm32mp1): use the BSEC nodes compatible for stm32mp13
fix(stm32mp13-fdts): correct the BSEC nodes compatible
fix(stm32mp1-fdts): move /omit-if-no-ref/ to overlay files
fix(stm32mp1): properly check PSCI functions return

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fix(stm32mp1-fdts): move /omit-if-no-ref/ to overlay files

To keep (as much as possible) alignment with Linux DT, move the
/omit-if-no-ref/ keywords to DT overlay files (fdts/stm32mp1*-bl*.dtsi).
Th

fix(stm32mp1-fdts): move /omit-if-no-ref/ to overlay files

To keep (as much as possible) alignment with Linux DT, move the
/omit-if-no-ref/ keywords to DT overlay files (fdts/stm32mp1*-bl*.dtsi).
This also ease checks for ST tools.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Ib467a6b65f05a84c9678799ad32e1820249b4ed1

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Merge changes I6b4a4d22,I06bde289,I86e39481,I7ea9b75c into integration

* changes:
feat(stm32mp1-fdts): use /omit-if-no-ref/ for pins nodes
feat(st): mandate dtc version 1.4.7
refactor(st): mov

Merge changes I6b4a4d22,I06bde289,I86e39481,I7ea9b75c into integration

* changes:
feat(stm32mp1-fdts): use /omit-if-no-ref/ for pins nodes
feat(st): mandate dtc version 1.4.7
refactor(st): move mbedtls config files
refactor(st): add common mk files

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feat(stm32mp1-fdts): use /omit-if-no-ref/ for pins nodes

With the /omit-if-no-ref/ keyword in DT, the non-referenced nodes
are just removed. This allows reducing the size of device tree blobs.
Setti

feat(stm32mp1-fdts): use /omit-if-no-ref/ for pins nodes

With the /omit-if-no-ref/ keyword in DT, the non-referenced nodes
are just removed. This allows reducing the size of device tree blobs.
Setting it before pins node allows a size reduction of more than 2kB.
The corresponding nodes can also be removed from BL2 and BL32 DT
overlays.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I6b4a4d227d5592e1d253a1b35da2dafaac2ddcae

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Merge "feat(stm32mp15-fdts): add Avenger96 board with STM32MP157A DHCOR SoM" into integration

feat(stm32mp15-fdts): add Avenger96 board with STM32MP157A DHCOR SoM

This should replace the stm32mp157a-avenger96.dts with the new device
tree files split into the STM32MP15 DHCOR SoM definition an

feat(stm32mp15-fdts): add Avenger96 board with STM32MP157A DHCOR SoM

This should replace the stm32mp157a-avenger96.dts with the new device
tree files split into the STM32MP15 DHCOR SoM definition and the
Avenger96 baseboard like it's done in Linux and U-Boot.

Differences to stm32mp157a-avenger96.dts:
- Enable sdmmc2 for booting from eMMC
- improved clock settings like in U-Boot commit b6055945
"ARM: dts: stm32: Adjust PLL4 settings on AV96 again"
- improved DDR settings for DHSOMs like in U-Boot commit 92ca0f74
"ARM: dts: stm32: Synchronize DDR setttings on DH SoMs"

TF-A with this new dts(i) files on this board was fully tested with
the latest OP-TEE developer setup.

Change-Id: I85ce8eca7747965af3555fc19fd7b192dc3e5740
Signed-off-by: Johann Neuhauser <jneuhauser@dh-electronics.com>

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Merge changes Ie650728a,Ie2736ef4 into integration

* changes:
refactor(stm32mp1-fdts): add missing spaces for consistent codestyle
refactor(stm32mp1-fdts): drop unused DDR calibration result on

Merge changes Ie650728a,Ie2736ef4 into integration

* changes:
refactor(stm32mp1-fdts): add missing spaces for consistent codestyle
refactor(stm32mp1-fdts): drop unused DDR calibration result on DHCOM

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refactor(stm32mp1-fdts): add missing spaces for consistent codestyle

Change-Id: Ie650728a0c671f553679b050afd969ce604ca111
Signed-off-by: Johann Neuhauser <jneuhauser@dh-electronics.com>

Merge "fix(fdts stm32mp1): correct copyright dates" into integration

fix(fdts stm32mp1): correct copyright dates

Add 2021 year in the file header Copyright line.

Change-Id: I09f7bef1f746c429ff308286169354e58648a1cd
Signed-off-by: Yann Gautier <yann.gautier@st.com>

Merge changes from topic "st_dt_update" into integration

* changes:
fix(fdts stm32mp1): update PLL nodes for ED1/EV1 boards
fix(fdts stm32mp1): set ETH clock on PLL4P on ST boards
feat(fdts st

Merge changes from topic "st_dt_update" into integration

* changes:
fix(fdts stm32mp1): update PLL nodes for ED1/EV1 boards
fix(fdts stm32mp1): set ETH clock on PLL4P on ST boards
feat(fdts stm32mp1): delete nodes for non-used boot devices
fix(fdts stm32mp1): use 'kHz' as kilohertz abbreviation
refactor(fdts stm32mp1): move STM32MP DDR node
feat(fdts stm32mp1): align DT with latest kernel

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feat(fdts stm32mp1): align DT with latest kernel

Update STM32MP1 device tree files with kernel 5.15.

Change-Id: Id405a79e18c61e80cd2292a4f87b7b9641df9c82
Signed-off-by: Yann Gautier <yann.gautier@s

feat(fdts stm32mp1): align DT with latest kernel

Update STM32MP1 device tree files with kernel 5.15.

Change-Id: Id405a79e18c61e80cd2292a4f87b7b9641df9c82
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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Merge changes I2c9aecc9,Ie6a019f4,Ief6f0a63,Iec9c80f2 into integration

* changes:
fdts: stm32mp1: add support for the Seeed Odyssey SoM and board
fdts: stm32mp1: add alternative SDMMC2 pins to t

Merge changes I2c9aecc9,Ie6a019f4,Ief6f0a63,Iec9c80f2 into integration

* changes:
fdts: stm32mp1: add support for the Seeed Odyssey SoM and board
fdts: stm32mp1: add alternative SDMMC2 pins to the pinctrl
fdts: stm32mp1: add I2C2 pins in the pinctrl
fdts: stm32mp1: add the I2C2 peripheral in the SoC DTS

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fdts: stm32mp1: add alternative SDMMC2 pins to the pinctrl

The new pins—PA8, PA9, PE5, and PC7—are described in a new pinctrl node
named “sdmmc2-d47-3”, AKA phandle “sdmmc2_d47_pins_d”. These names

fdts: stm32mp1: add alternative SDMMC2 pins to the pinctrl

The new pins—PA8, PA9, PE5, and PC7—are described in a new pinctrl node
named “sdmmc2-d47-3”, AKA phandle “sdmmc2_d47_pins_d”. These names are
identical to their Linux kernel counterparts (commit
7af08140979a6e7e12b78c93b8625c8d25b084e2).

Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Change-Id: Ie6a019f4361790f6b5d4910ce1e7b507a6c6a21a

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fdts: stm32mp1: add I2C2 pins in the pinctrl

Some STM32MP1‐based boards, like Seeed Studio’s SoM‐STM32MP157C, have
the SoC connected to the PMIC via I2C2 instead of I2C4 (which is used on
the offici

fdts: stm32mp1: add I2C2 pins in the pinctrl

Some STM32MP1‐based boards, like Seeed Studio’s SoM‐STM32MP157C, have
the SoC connected to the PMIC via I2C2 instead of I2C4 (which is used on
the official ST development boards). This commit brings TF‑A one step
closer to boot on such boards.

The pins used, PH4 and PH5, are described in a new pinctrl node named
“i2c2-0”, AKA phandle “i2c2_pins_a”. These names are identical to their
Linux kernel counterparts (commit
7af08140979a6e7e12b78c93b8625c8d25b084e2).

Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Change-Id: Ief6f0a632cfa992dcf3fed95d266ad6a07a96fe0

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Merge "fdts: stm32mp1: realign device tree with kernel" into integration

fdts: stm32mp1: realign device tree with kernel

There is one dtsi file per SoC version:
- STM32MP151: common part for all version, Single Cortex-A7
- STM32MP153: Dual Cortex-A7
- STM32MP157: + GPU a

fdts: stm32mp1: realign device tree with kernel

There is one dtsi file per SoC version:
- STM32MP151: common part for all version, Single Cortex-A7
- STM32MP153: Dual Cortex-A7
- STM32MP157: + GPU and DSI, but not needed for TF-A

The STM32MP15xC include a cryptography peripheral, add it in a dedicated
file.

There are 4 packages available, for which the IOs number change. Have one
file for each package. The 2 packages AB and AD are added.

STM32157A-DK1 and STM32MP157C-DK2 share most of their features, a common
dkx file is then created.

Some reordering is done in other files, and realign with kernel DT files.

The DDR files are generated with our internal tool, no changes in the
registers values.

Change-Id: I9f2ef00306310abe34b94c2f10fc7a77a10493d1
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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