10400ccb6SJeenu Viswambharan/* 22d51b55eSBalint Dobszay * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved. 30400ccb6SJeenu Viswambharan * 40400ccb6SJeenu Viswambharan * SPDX-License-Identifier: BSD-3-Clause 50400ccb6SJeenu Viswambharan */ 60400ccb6SJeenu Viswambharan 7003faaa5SAlexei Fedorov/* DynamIQ configuration: 1 cluster with up to 8 CPUs */ 8003faaa5SAlexei Fedorov 9003faaa5SAlexei Fedorov/* Set default value if not passed from platform's makefile */ 10003faaa5SAlexei Fedorov#ifdef FVP_MAX_PE_PER_CPU 11003faaa5SAlexei Fedorov#define PE_PER_CPU FVP_MAX_PE_PER_CPU 12003faaa5SAlexei Fedorov#else 13003faaa5SAlexei Fedorov#define PE_PER_CPU 1 14003faaa5SAlexei Fedorov#endif 15003faaa5SAlexei Fedorov 16*589aaba4SAndre Przywara#include "fvp-defs-dynamiq.dtsi" 17*589aaba4SAndre Przywara 180400ccb6SJeenu Viswambharan/dts-v1/; 190400ccb6SJeenu Viswambharan 20*589aaba4SAndre Przywara/memreserve/ 0x80000000 0x00010000; 21*589aaba4SAndre Przywara 22*589aaba4SAndre Przywara#include "fvp-base-gicv3.dtsi" 23*589aaba4SAndre Przywara#include "fvp-base-psci-common.dtsi" 24