| #
53e4c160 |
| 11-Oct-2022 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge changes from topic "fvp_dts_rework" into integration
* changes: fix(fvp_ve): fdts: Fix vexpress,config-bus subnode names fix(fvp): fdts: Fix idle-states entry method fix(fvp): fdts: fix
Merge changes from topic "fvp_dts_rework" into integration
* changes: fix(fvp_ve): fdts: Fix vexpress,config-bus subnode names fix(fvp): fdts: Fix idle-states entry method fix(fvp): fdts: fix memtimer subframe addressing feat(fvp): fdts: update rtsm_ve DT files from the Linux kernel refactor(fvp): fdts: consolidate GICv2 base FVP DT files refactor(fvp): fdts: consolidate GICv3 base FVP DT files feat(fvp): dts: drop 32-bit .dts files refactor(fvp): fdts: merge motherboard .dtsi files refactor(fvp_ve): fdts: prepare Cortex-A5 and A7 model DTs fix(fvp): fdts: unify and fix PSCI nodes
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| #
a885a7d2 |
| 19-Aug-2022 |
Andre Przywara <andre.przywara@arm.com> |
refactor(fvp): fdts: consolidate GICv2 base FVP DT files
The GICv2 and GICv3 version of the FVP DT files are unnecessarily split, as the common part of the peripherals is the same: it's literally ju
refactor(fvp): fdts: consolidate GICv2 base FVP DT files
The GICv2 and GICv3 version of the FVP DT files are unnecessarily split, as the common part of the peripherals is the same: it's literally just the interrupt controller node that is different. Since the GICv3 versions now use a generic DT include file (without any GIC node), let's reuse that for the GICv2 versions of the FVP as well. We just add a separate fvp-base-gicv2.dtsi file which describes the GICv2 interrupt controller. Also shorten the compatible string, since the GICv2 binding documentation does not allow the current combination.
This allows to remove the mostly redundant nodes from the GICv2 .dts file.
Change-Id: I9018031bb611fb00ca7dbefc1bff7d40c3f05819 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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| #
08f3c2bc |
| 19-Aug-2022 |
Andre Przywara <andre.przywara@arm.com> |
refactor(fvp): fdts: merge motherboard .dtsi files
For no real reason we were shipping two separate DT include files for the base FVP motherboard peripherals, one for aarch32, one for aarch64. There
refactor(fvp): fdts: merge motherboard .dtsi files
For no real reason we were shipping two separate DT include files for the base FVP motherboard peripherals, one for aarch32, one for aarch64. There is no difference in the hardware description when using a different instruction set, and the diff between the two files was about a missing interrupt map for the 64-bit DT files.
Consolidate the situation by just using a single motherboard .dtsi file, which relies on an interrupt map by the including files. Provide that map in the two files where it was missing before, and change the filenames to let all users include the same file now.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Change-Id: I19b77ecc8da9b4bfbd61d02f910b9ab05dbf92e9
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| #
6b2721c0 |
| 10-Dec-2021 |
Andre Przywara <andre.przywara@arm.com> |
fix(fvp): fdts: unify and fix PSCI nodes
The PSCI DT nodes used for the various fvp-base model variants provide explicit function IDs, as required for the pre-v0.2 PSCI specification. This prevents
fix(fvp): fdts: unify and fix PSCI nodes
The PSCI DT nodes used for the various fvp-base model variants provide explicit function IDs, as required for the pre-v0.2 PSCI specification. This prevents them from being used from both AArch32 and AArch64 DT clients, and using this version of the PSCI spec is long deprecated anyway.
Remove the old compatible string and the function properties, to force clients to use the standard function IDs as described in the PSCI spec. sys_poweroff and sys_reset were never standardised or used anyway.
There should be no client software around that cannot deal with PSCI v0.2.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Change-Id: Ie87deb9898eae79b7307c15bcefcd4b311d4dc22
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| #
967f0621 |
| 28-Apr-2021 |
Olivier Deprez <olivier.deprez@arm.com> |
Merge changes from topic "mit-license" into integration
* changes: fix(dt-bindings): fix static checks docs(license): rectify `arm-gic.h` license
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| #
0861fcdd |
| 23-Apr-2021 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
fix(dt-bindings): fix static checks
This patch fixes static checks errors reported for missing copyright in `include/dt-bindings/interrupt-controller/arm-gic.h` and the include order of header files
fix(dt-bindings): fix static checks
This patch fixes static checks errors reported for missing copyright in `include/dt-bindings/interrupt-controller/arm-gic.h` and the include order of header files in `.dts` and `.dtsi` files.
Change-Id: I2baaf2719fd2c84cbcc08a8f0c4440a17a9f24f6 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com> Signed-off-by: Chris Kay <chris.kay@arm.com>
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| #
3e942205 |
| 22-Apr-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "Plat FVP: Fix Generic Timer interrupt types" into integration
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| #
dfa6c540 |
| 12-Apr-2021 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
Plat FVP: Fix Generic Timer interrupt types
The Arm Generic Timer specification mandates that the interrupt associated with each timer is low level triggered, see:
Arm Cortex-A76 Core: "Each timer
Plat FVP: Fix Generic Timer interrupt types
The Arm Generic Timer specification mandates that the interrupt associated with each timer is low level triggered, see:
Arm Cortex-A76 Core: "Each timer provides an active-LOW interrupt output to the SoC."
Arm Cortex-A53 MPCore Processor: "It generates timer events as active-LOW interrupt outputs and event streams."
The following files in fdts\
fvp-base-gicv3-psci-common.dtsi fvp-base-gicv3-psci-aarch32-common.dtsi fvp-base-gicv2-psci-aarch32.dts fvp-base-gicv2-psci.dts fvp-foundation-gicv2-psci.dts fvp-foundation-gicv3-psci.dts
describe interrupt types as edge rising IRQ_TYPE_EDGE_RISING = 0x01:
interrupts = <1 13 0xff01>, <1 14 0xff01>, <1 11 0xff01>, <1 10 0xff01>;
, see include\dt-bindings\interrupt-controller\arm-gic.h:
which causes Linux to generate the warnings below: arch_timer: WARNING: Invalid trigger for IRQ5, assuming level low arch_timer: WARNING: Please fix your firmware
This patch adds GIC_CPU_MASK_RAW macro definition to include\dt-bindings\interrupt-controller\arm-gic.h, modifies interrupt type to IRQ_TYPE_LEVEL_LOW and makes use of type definitions in arm-gic.h.
Change-Id: Iafa2552a9db85a0559c73353f854e2e0066ab2b9 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
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| #
76df74df |
| 21-May-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "FVP: Add support for passing platform's topology to DTS" into integration
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| #
003faaa5 |
| 13-May-2020 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
FVP: Add support for passing platform's topology to DTS
This patch adds support for passing FVP platform's topology configuration to DTS files for compilation, which allows to build DTBs with correc
FVP: Add support for passing platform's topology to DTS
This patch adds support for passing FVP platform's topology configuration to DTS files for compilation, which allows to build DTBs with correct number of clusters and CPUs. This removes non-existing clusters/CPUs from the compiled device tree blob and fixes reported Linux errors when trying to power on absent CPUs/PEs. If DTS file is passed using FVP_HW_CONFIG_DTS build option from the platform's makefile, FVP_CLUSTER_COUNT, FVP_MAX_CPUS_PER_CLUSTER and FVP_MAX_PE_PER_CPU parameters are used, otherwise CI script will use the default values from the corresponding DTS file.
Change-Id: Idcb45dc6ad5e3eaea18573aff1a01c9344404ab3 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
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| #
d2737fe1 |
| 12-Mar-2020 |
Mark Dykes <mardyk01@review.trustedfirmware.org> |
Merge changes from topic "mp/enhanced_pal_hw" into integration
* changes: plat/arm/fvp: populate pwr domain descriptor dynamically fconf: Extract topology node properties from HW_CONFIG dtb fc
Merge changes from topic "mp/enhanced_pal_hw" into integration
* changes: plat/arm/fvp: populate pwr domain descriptor dynamically fconf: Extract topology node properties from HW_CONFIG dtb fconf: necessary modifications to support fconf in BL31 & SP_MIN fconf: enhancements to firmware configuration framework
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| #
4682461d |
| 27-Dec-2019 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
fconf: Extract topology node properties from HW_CONFIG dtb
Create, register( and implicitly invoke) fconf_populate_topology() function which extracts the topology related properties from dtb into th
fconf: Extract topology node properties from HW_CONFIG dtb
Create, register( and implicitly invoke) fconf_populate_topology() function which extracts the topology related properties from dtb into the newly created fconf based configuration structure 'soc_topology'. Appropriate libfdt APIs are added to jmptbl.i file for use with USE_ROMLIB build feature.
A new property which describes the power domain levels is added to the HW_CONFIG device tree source files.
This patch also fixes a minor bug in the common device tree file fvp-base-gicv3-psci-dynamiq-common.dtsi As this file includes fvp-base-gicv3-psci-common.dtsi, it is necessary to delete all previous cluster node definitons because DynamIQ based models have upto 8 CPUs in each cluster. If not deleted, the final dts would have an inaccurate description of SoC topology, i.e., cluster0 with 8 or more core nodes and cluster1 with 4 core nodes.
Change-Id: I9eb406da3ba4732008a66c01afec7c9fa8ef59bf Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>
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| #
e5eaf885 |
| 21-Jan-2020 |
Manish Pandey <manish.pandey2@arm.com> |
Merge "Replace dts includes with C preprocessor syntax" into integration
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| #
2d51b55e |
| 10-Jan-2020 |
Balint Dobszay <balint.dobszay@arm.com> |
Replace dts includes with C preprocessor syntax
Using the /include/ syntax, the include was evaluated by dtc, only after running the preprocessor, therefore the .dtsi files were not preprocessed. Th
Replace dts includes with C preprocessor syntax
Using the /include/ syntax, the include was evaluated by dtc, only after running the preprocessor, therefore the .dtsi files were not preprocessed. This patch adds the #include syntax instead. Evaluating this and preprocessing the files now happens in a single step, done by the C preprocessor.
Change-Id: I6d0104b6274316fc736e84973502a4d6c2c9d6e0 Signed-off-by: Balint Dobszay <balint.dobszay@arm.com>
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| #
c396b736 |
| 09-Jun-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #972 from achingupta/ag/freebsd-dt-change
Device tree changes to boot FreeBSD on FVPs
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| #
8d2c4977 |
| 26-Sep-2016 |
Achin Gupta <achin.gupta@arm.com> |
Device tree changes to boot FreeBSD on FVPs
FreeBSD does not understand #interrupt-map in a device tree. This prevents the GIC from being set up correctly. This patch removes the #interrupt-map in t
Device tree changes to boot FreeBSD on FVPs
FreeBSD does not understand #interrupt-map in a device tree. This prevents the GIC from being set up correctly. This patch removes the #interrupt-map in the device trees for the Base and Foundation FVPs. This enables correct boot of FreeBSD on these platforms.
These changes have been tested with FreeBSD and an Ubuntu cloud image (ubuntu-16.04-server-cloudimg-arm64-uefi1.img) to ensure compatibility with Linux.
Change-Id: I1347acdcf994ec4b1dd843ba32af9951aa54db73 Signed-off-by: Achin Gupta <achin.gupta@arm.com>
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| #
55a85659 |
| 16-Mar-2016 |
danh-arm <dan.handley@arm.com> |
Merge pull request #552 from antonio-nino-diaz-arm/an/cache-dts
Add cache topology info to FVP DTBs
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| #
b1063d95 |
| 22-Feb-2016 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Add cache topology info to FVP DTBs
From version 4.0 onwards, the ARM64 Linux kernel expects the device tree to indicate the cache hierarchy. Failing to provide this information results in the follo
Add cache topology info to FVP DTBs
From version 4.0 onwards, the ARM64 Linux kernel expects the device tree to indicate the cache hierarchy. Failing to provide this information results in the following warning message to be printed by the kernel:
`Unable to detect cache hierarchy from DT for CPU x`
All the FVP device trees provided in the TF source tree have been modified to add this information.
Fixes ARM-software/tf-issues#325
Change-Id: I0ff888992e602b81a0fe1744a86151d625727511
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| #
aaa48a86 |
| 29-Apr-2015 |
danh-arm <dan.handley@arm.com> |
Merge pull request #297 from sandrine-bailleux/sb/move-up-deps
Move up dependency versions
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| #
6136f372 |
| 16-Apr-2015 |
Juan Castillo <juan.castillo@arm.com> |
FVP: update device tree idle state entries
Device tree idle state bindings changed in kernel v3.18. This patch updates the FVP DT files to use PSCI suspend as idle state.
The patch also updates the
FVP: update device tree idle state entries
Device tree idle state bindings changed in kernel v3.18. This patch updates the FVP DT files to use PSCI suspend as idle state.
The patch also updates the 'compatible' property in the PSCI node and the 'entry-method' property in the idle-states node in the FVP Foundation GICv2-legacy device tree.
Change-Id: Ie921d497c579f425c03d482f9d7b90e166106e2f
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| #
07ddb33a |
| 26-Jan-2015 |
danh-arm <dan.handley@arm.com> |
Merge pull request #245 from danh-arm/sm/psci_version
Increment the PSCI VERSION to 1.0 (PR v2)
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| #
e8ca7d1e |
| 15-Jan-2015 |
Soby Mathew <soby.mathew@arm.com> |
Increment the PSCI VERSION to 1.0
This patch:
* Bumps the PSCI VERSION to 1.0. This means that the PSCI_VERSION API will now return the value 0x00010000 to indicate the version as 1.0.
Increment the PSCI VERSION to 1.0
This patch:
* Bumps the PSCI VERSION to 1.0. This means that the PSCI_VERSION API will now return the value 0x00010000 to indicate the version as 1.0. The firmware remains compatible with PSCI v0.2 clients.
* The firmware design guide is updated to document the APIs supported by the Trusted Firmware generic code.
* The FVP Device Tree Sources (dts) and Blobs(dtb) are also updated to add "psci-1.0" and "psci-0.2" to the list of compatible PSCI versions.
Change-Id: Iafc2f549c92651dcd65d7e24a8aae35790d00f8a
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| #
e822d7c1 |
| 20-Aug-2014 |
danh-arm <dan.handley@arm.com> |
Merge pull request #195 from achingupta/ag/fvp_dt_updates
FVP: Update device trees to match cpuidle driver
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| #
bab7bfd2 |
| 20-Aug-2014 |
Achin Gupta <achin.gupta@arm.com> |
FVP: Update device trees to match cpuidle driver
This patch updates the representation of idle tables and cpu/cluster topology in the device tree source files for the FVP to what the latest cpuidle
FVP: Update device trees to match cpuidle driver
This patch updates the representation of idle tables and cpu/cluster topology in the device tree source files for the FVP to what the latest cpuidle driver in Linux expects. The device tree binaries have also been updated.
Change-Id: If0668b96234f65aa0435fba52f288c9378bd8824
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| #
f139a39a |
| 19-Aug-2014 |
danh-arm <dan.handley@arm.com> |
Merge pull request #191 from danh-arm/jc/tf-issues/218
Add support for PSCI SYSTEM_OFF and SYSTEM_RESET APIs v2
|