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Searched refs:pmic_wrap_phase_id (Results 1 – 12 of 12) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/mt8186/drivers/spm/
H A Dmt_spm_pmic_wrap.h13 enum pmic_wrap_phase_id { enum
33 extern void mt_spm_pmic_wrap_set_phase(enum pmic_wrap_phase_id phase);
34 extern void mt_spm_pmic_wrap_set_cmd(enum pmic_wrap_phase_id phase,
36 extern uint64_t mt_spm_pmic_wrap_get_cmd(enum pmic_wrap_phase_id phase,
H A Dmt_spm_pmic_wrap.c28 enum pmic_wrap_phase_id phase;
111 void mt_spm_pmic_wrap_set_phase(enum pmic_wrap_phase_id phase) in mt_spm_pmic_wrap_set_phase()
134 void mt_spm_pmic_wrap_set_cmd(enum pmic_wrap_phase_id phase, uint32_t idx, in mt_spm_pmic_wrap_set_cmd()
156 uint64_t mt_spm_pmic_wrap_get_cmd(enum pmic_wrap_phase_id phase, uint32_t idx) in mt_spm_pmic_wrap_get_cmd()
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8188/
H A Dmt_spm_pmic_wrap.h14 enum pmic_wrap_phase_id { enum
41 void mt_spm_pmic_wrap_set_phase(enum pmic_wrap_phase_id phase);
42 void mt_spm_pmic_wrap_set_cmd(enum pmic_wrap_phase_id phase, unsigned int idx,
44 uint64_t mt_spm_pmic_wrap_get_cmd(enum pmic_wrap_phase_id phase, unsigned int idx);
H A Dmt_spm_pmic_wrap.c46 enum pmic_wrap_phase_id phase;
105 void mt_spm_pmic_wrap_set_phase(enum pmic_wrap_phase_id phase) in mt_spm_pmic_wrap_set_phase()
127 void mt_spm_pmic_wrap_set_cmd(enum pmic_wrap_phase_id phase, unsigned int idx, in mt_spm_pmic_wrap_set_cmd()
144 uint64_t mt_spm_pmic_wrap_get_cmd(enum pmic_wrap_phase_id phase, unsigned int idx) in mt_spm_pmic_wrap_get_cmd()
/rk3399_ARM-atf/plat/mediatek/mt8192/drivers/spm/
H A Dmt_spm_pmic_wrap.h13 enum pmic_wrap_phase_id { enum
40 extern void mt_spm_pmic_wrap_set_phase(enum pmic_wrap_phase_id phase);
41 extern void mt_spm_pmic_wrap_set_cmd(enum pmic_wrap_phase_id phase,
43 extern uint64_t mt_spm_pmic_wrap_get_cmd(enum pmic_wrap_phase_id phase,
H A Dmt_spm_pmic_wrap.c41 enum pmic_wrap_phase_id phase;
100 void mt_spm_pmic_wrap_set_phase(enum pmic_wrap_phase_id phase) in mt_spm_pmic_wrap_set_phase()
126 void mt_spm_pmic_wrap_set_cmd(enum pmic_wrap_phase_id phase, uint32_t idx, in mt_spm_pmic_wrap_set_cmd()
148 uint64_t mt_spm_pmic_wrap_get_cmd(enum pmic_wrap_phase_id phase, uint32_t idx) in mt_spm_pmic_wrap_get_cmd()
/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/spm/
H A Dmt_spm_pmic_wrap.h13 enum pmic_wrap_phase_id { enum
40 extern void mt_spm_pmic_wrap_set_phase(enum pmic_wrap_phase_id phase);
41 extern void mt_spm_pmic_wrap_set_cmd(enum pmic_wrap_phase_id phase,
43 extern uint64_t mt_spm_pmic_wrap_get_cmd(enum pmic_wrap_phase_id phase,
H A Dmt_spm_pmic_wrap.c41 enum pmic_wrap_phase_id phase;
100 void mt_spm_pmic_wrap_set_phase(enum pmic_wrap_phase_id phase) in mt_spm_pmic_wrap_set_phase()
126 void mt_spm_pmic_wrap_set_cmd(enum pmic_wrap_phase_id phase, uint32_t idx, in mt_spm_pmic_wrap_set_cmd()
148 uint64_t mt_spm_pmic_wrap_get_cmd(enum pmic_wrap_phase_id phase, uint32_t idx) in mt_spm_pmic_wrap_get_cmd()
/rk3399_ARM-atf/plat/mediatek/mt8183/drivers/spm/
H A Dspm_pmic_wrap.h14 enum pmic_wrap_phase_id { enum
45 void mt_spm_pmic_wrap_set_phase(enum pmic_wrap_phase_id phase);
46 void mt_spm_pmic_wrap_set_cmd(enum pmic_wrap_phase_id phase,
48 uint64_t mt_spm_pmic_wrap_get_cmd(enum pmic_wrap_phase_id phase, uint32_t idx);
H A Dspm_pmic_wrap.c44 enum pmic_wrap_phase_id phase;
115 void mt_spm_pmic_wrap_set_phase(enum pmic_wrap_phase_id phase) in mt_spm_pmic_wrap_set_phase()
139 void mt_spm_pmic_wrap_set_cmd(enum pmic_wrap_phase_id phase, uint32_t idx, in mt_spm_pmic_wrap_set_cmd()
160 uint64_t mt_spm_pmic_wrap_get_cmd(enum pmic_wrap_phase_id phase, uint32_t idx) in mt_spm_pmic_wrap_get_cmd()
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/
H A Dmt_plat_spm_setting.h16 enum pmic_wrap_phase_id { enum
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8196/
H A Dmt_plat_spm_setting.h15 enum pmic_wrap_phase_id { enum