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Searched refs:mmio_write_64 (Results 1 – 25 of 35) sorted by relevance

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/rk3399_ARM-atf/drivers/renesas/rzg/qos/G2N/
H A Dqos_init_g2n_v10.c137 mmio_write_64(QOSCTRL_DANN, 0x0402000002020201UL); in qos_init_g2n_v10()
151 mmio_write_64(QOSBW_FIX_QOS_BANK0 + i * 8U, mstat_fix[i]); in qos_init_g2n_v10()
152 mmio_write_64(QOSBW_FIX_QOS_BANK1 + i * 8U, mstat_fix[i]); in qos_init_g2n_v10()
155 mmio_write_64(QOSBW_BE_QOS_BANK0 + i * 8U, mstat_be[i]); in qos_init_g2n_v10()
156 mmio_write_64(QOSBW_BE_QOS_BANK1 + i * 8U, mstat_be[i]); in qos_init_g2n_v10()
160 mmio_write_64(QOSWT_FIX_WTQOS_BANK0 + i * 8U, qoswt_fix[i]); in qos_init_g2n_v10()
161 mmio_write_64(QOSWT_FIX_WTQOS_BANK1 + i * 8U, qoswt_fix[i]); in qos_init_g2n_v10()
164 mmio_write_64(QOSWT_BE_WTQOS_BANK0 + i * 8U, qoswt_be[i]); in qos_init_g2n_v10()
165 mmio_write_64(QOSWT_BE_WTQOS_BANK1 + i * 8U, qoswt_be[i]); in qos_init_g2n_v10()
/rk3399_ARM-atf/drivers/renesas/rzg/qos/G2M/
H A Dqos_init_g2m_v30.c145 mmio_write_64(QOSCTRL_DANN, 0x0404020002020201UL); in qos_init_g2m_v30()
162 mmio_write_64(QOSBW_FIX_QOS_BANK0 + i * 8U, mstat_fix[i]); in qos_init_g2m_v30()
163 mmio_write_64(QOSBW_FIX_QOS_BANK1 + i * 8U, mstat_fix[i]); in qos_init_g2m_v30()
166 mmio_write_64(QOSBW_BE_QOS_BANK0 + i * 8U, mstat_be[i]); in qos_init_g2m_v30()
167 mmio_write_64(QOSBW_BE_QOS_BANK1 + i * 8U, mstat_be[i]); in qos_init_g2m_v30()
171 mmio_write_64(QOSWT_FIX_WTQOS_BANK0 + i * 8U, qoswt_fix[i]); in qos_init_g2m_v30()
172 mmio_write_64(QOSWT_FIX_WTQOS_BANK1 + i * 8U, qoswt_fix[i]); in qos_init_g2m_v30()
175 mmio_write_64(QOSWT_BE_WTQOS_BANK0 + i * 8U, qoswt_be[i]); in qos_init_g2m_v30()
176 mmio_write_64(QOSWT_BE_WTQOS_BANK1 + i * 8U, qoswt_be[i]); in qos_init_g2m_v30()
H A Dqos_init_g2m_v11.c145 mmio_write_64(QOSCTRL_DANN, 0x0404020002020201UL); in qos_init_g2m_v11()
161 mmio_write_64(QOSBW_FIX_QOS_BANK0 + i * 8U, mstat_fix[i]); in qos_init_g2m_v11()
162 mmio_write_64(QOSBW_FIX_QOS_BANK1 + i * 8U, mstat_fix[i]); in qos_init_g2m_v11()
165 mmio_write_64(QOSBW_BE_QOS_BANK0 + i * 8U, mstat_be[i]); in qos_init_g2m_v11()
166 mmio_write_64(QOSBW_BE_QOS_BANK1 + i * 8U, mstat_be[i]); in qos_init_g2m_v11()
170 mmio_write_64(QOSWT_FIX_WTQOS_BANK0 + i * 8U, qoswt_fix[i]); in qos_init_g2m_v11()
171 mmio_write_64(QOSWT_FIX_WTQOS_BANK1 + i * 8U, qoswt_fix[i]); in qos_init_g2m_v11()
174 mmio_write_64(QOSWT_BE_WTQOS_BANK0 + i * 8U, qoswt_be[i]); in qos_init_g2m_v11()
175 mmio_write_64(QOSWT_BE_WTQOS_BANK1 + i * 8U, qoswt_be[i]); in qos_init_g2m_v11()
H A Dqos_init_g2m_v10.c94 mmio_write_64(QOSCTRL_DANN, 0x0101010102020201UL); in qos_init_g2m_v10()
97 mmio_write_64(QOSCTRL_EMS, 0x0000000000000000UL); in qos_init_g2m_v10()
112 mmio_write_64(QOSBW_FIX_QOS_BANK0 + i * 8U, mstat_fix[i]); in qos_init_g2m_v10()
113 mmio_write_64(QOSBW_FIX_QOS_BANK1 + i * 8U, mstat_fix[i]); in qos_init_g2m_v10()
116 mmio_write_64(QOSBW_BE_QOS_BANK0 + i * 8U, mstat_be[i]); in qos_init_g2m_v10()
117 mmio_write_64(QOSBW_BE_QOS_BANK1 + i * 8U, mstat_be[i]); in qos_init_g2m_v10()
/rk3399_ARM-atf/drivers/renesas/rzg/qos/G2H/
H A Dqos_init_g2h_v30.c146 mmio_write_64(QOSCTRL_DANN, 0x0404020002020201UL); in qos_init_g2h_v30()
162 mmio_write_64(QOSBW_FIX_QOS_BANK0 + i * 8U, mstat_fix[i]); in qos_init_g2h_v30()
163 mmio_write_64(QOSBW_FIX_QOS_BANK1 + i * 8U, mstat_fix[i]); in qos_init_g2h_v30()
166 mmio_write_64(QOSBW_BE_QOS_BANK0 + i * 8U, mstat_be[i]); in qos_init_g2h_v30()
167 mmio_write_64(QOSBW_BE_QOS_BANK1 + i * 8U, mstat_be[i]); in qos_init_g2h_v30()
171 mmio_write_64(QOSWT_FIX_WTQOS_BANK0 + i * 8U, qoswt_fix[i]); in qos_init_g2h_v30()
172 mmio_write_64(QOSWT_FIX_WTQOS_BANK1 + i * 8U, qoswt_fix[i]); in qos_init_g2h_v30()
175 mmio_write_64(QOSWT_BE_WTQOS_BANK0 + i * 8U, qoswt_be[i]); in qos_init_g2h_v30()
176 mmio_write_64(QOSWT_BE_WTQOS_BANK1 + i * 8U, qoswt_be[i]); in qos_init_g2h_v30()
/rk3399_ARM-atf/drivers/renesas/rzg/qos/G2E/
H A Dqos_init_g2e_v10.c101 mmio_write_64(QOSCTRL_DANN, 0x0404020002020201UL); in qos_init_g2e_v10()
116 mmio_write_64(QOSBW_FIX_QOS_BANK0 + i * 8U, mstat_fix[i]); in qos_init_g2e_v10()
117 mmio_write_64(QOSBW_FIX_QOS_BANK1 + i * 8U, mstat_fix[i]); in qos_init_g2e_v10()
120 mmio_write_64(QOSBW_BE_QOS_BANK0 + i * 8U, mstat_be[i]); in qos_init_g2e_v10()
121 mmio_write_64(QOSBW_BE_QOS_BANK1 + i * 8U, mstat_be[i]); in qos_init_g2e_v10()
/rk3399_ARM-atf/plat/intel/soc/agilex5/
H A Dbl31_plat_setup.c59 mmio_write_64(PLAT_SEC_ENTRY, PLAT_SEC_WARM_ENTRY); in bl31_early_platform_setup2()
272 mmio_write_64(RSTMGR_CPUxRESETBASELOW_CPU2, in bl31_plat_set_secondary_cpu_entrypoint()
276 mmio_write_64(RSTMGR_CPUxRESETBASELOW_CPU0, in bl31_plat_set_secondary_cpu_entrypoint()
281 mmio_write_64(RSTMGR_CPUxRESETBASELOW_CPU1, (uint64_t) plat_secondary_cpus_bl31_entry >> 2); in bl31_plat_set_secondary_cpu_entrypoint()
282 mmio_write_64(RSTMGR_CPUxRESETBASELOW_CPU3, (uint64_t) plat_secondary_cpus_bl31_entry >> 2); in bl31_plat_set_secondary_cpu_entrypoint()
/rk3399_ARM-atf/plat/intel/soc/common/
H A Dsocfpga_psci.c77 mmio_write_64(PLAT_CPUID_RELEASE, cpu_id); in socfpga_pwr_domain_on()
92 mmio_write_64(PLAT_CPUID_RELEASE, cpu_id); in socfpga_pwr_domain_on()
321 mmio_write_64(PLAT_SEC_ENTRY, sec_entrypoint); in plat_setup_psci_ops()
/rk3399_ARM-atf/plat/aspeed/ast2700/
H A Dplat_pm.c36 mmio_write_64(ep_reg, sec_ep); in plat_pwr_domain_on()
/rk3399_ARM-atf/plat/intel/soc/n5x/
H A Dbl31_plat_setup.c44 mmio_write_64(PLAT_SEC_ENTRY, 0); in bl31_early_platform_setup2()
116 mmio_write_64(PLAT_CPU_RELEASE_ADDR, in bl31_platform_setup()
/rk3399_ARM-atf/plat/intel/soc/stratix10/
H A Dbl31_plat_setup.c52 mmio_write_64(PLAT_SEC_ENTRY, PLAT_SEC_WARM_ENTRY); in bl31_early_platform_setup2()
123 mmio_write_64(PLAT_CPU_RELEASE_ADDR, in bl31_platform_setup()
/rk3399_ARM-atf/plat/rpi/common/
H A Drpi3_pm.c156 mmio_write_64(hold_base, PLAT_RPI3_TM_HOLD_STATE_GO); in rpi3_pwr_domain_on()
198 mmio_write_64(hold_base, PLAT_RPI3_TM_HOLD_STATE_BSP_OFF); in rpi3_pwr_down_wfi()
/rk3399_ARM-atf/drivers/arm/gic/v3/
H A Dgicv3_private.h83 mmio_write_64((base) + GICD_OFFSET_64(REG, (id)), (val))
636 mmio_write_64(base + GICR_PROPBASER, val); in gicr_write_propbaser()
649 mmio_write_64(base + GICR_PENDBASER, val); in gicr_write_pendbaser()
672 mmio_write_64(base + GITS_CBASER, val); in gits_write_cbaser()
682 mmio_write_64(base + GITS_CWRITER, val); in gits_write_cwriter()
696 mmio_write_64(base + GITS_BASER + (8U * its_table_id), val); in gits_write_baser()
H A Dgic600_multichip_private.h115 mmio_write_64(base + (GICD_CHIPR + (8U * n)), val); in write_gicd_chipr_n()
/rk3399_ARM-atf/drivers/st/crypto/
H A Dstm32_pka.c380 mmio_write_64(addr + word_index * sizeof(tmp), tmp); in write_eo_data()
401 mmio_write_64(base + _PKA_RAM_N_LEN, curve_def[cid].n_len); in stm32_pka_ecdsa_verif_configure_curve()
402 mmio_write_64(base + _PKA_RAM_P_LEN, curve_def[cid].p_len); in stm32_pka_ecdsa_verif_configure_curve()
403 mmio_write_64(base + _PKA_RAM_A_SIGN, curve_def[cid].a_sign); in stm32_pka_ecdsa_verif_configure_curve()
/rk3399_ARM-atf/plat/nuvoton/npcm845x/
H A Dnpcm845x_psci.c147 mmio_write_64(hold_base, PLAT_NPCM_TM_HOLD_STATE_GO); in npcm845x_pwr_domain_on()
346 mmio_write_64(hold_base, PLAT_NPCM_TM_HOLD_STATE_BSP_OFF); in npcm845x_pwr_down_wfi()
/rk3399_ARM-atf/plat/intel/soc/agilex/
H A Dbl31_plat_setup.c85 mmio_write_64(PLAT_SEC_ENTRY, PLAT_SEC_WARM_ENTRY); in bl31_early_platform_setup2()
199 mmio_write_64(PLAT_CPU_RELEASE_ADDR, in bl31_platform_setup()
/rk3399_ARM-atf/include/lib/
H A Dmmio.h49 static inline void mmio_write_64(uintptr_t addr, uint64_t value) in mmio_write_64() function
/rk3399_ARM-atf/plat/hisilicon/hikey/
H A Dhisi_pwrc.c37 mmio_write_64((uintptr_t)(core_entry + i), entry_point); in hisi_pwrc_set_core_bx_addr()
/rk3399_ARM-atf/plat/socionext/uniphier/
H A Duniphier_psci.c42 mmio_write_64(uniphier_rom_rsv_base + UNIPHIER_ROM_RSV0, in uniphier_psci_pwr_domain_on()
/rk3399_ARM-atf/drivers/arm/smmu/
H A Dsmmu_v3.c123 mmio_write_64(smmu_base + SMMU_ROOT_GPT_BASE, in smmuv3_init()
/rk3399_ARM-atf/drivers/st/ddr/
H A Dstm32mp_ddr_test.c24 mmio_write_64(addr, (uint64_t)value); in mmio_write_pattern()
/rk3399_ARM-atf/plat/amlogic/axg/
H A Daxg_pm.c34 mmio_write_64(cpu_mailbox_addr, value); in axg_pm_set_reset_addr()
/rk3399_ARM-atf/plat/amlogic/gxbb/
H A Dgxbb_pm.c35 mmio_write_64(cpu_mailbox_addr, value); in gxbb_program_mailbox()
/rk3399_ARM-atf/plat/amlogic/gxl/
H A Dgxl_pm.c35 mmio_write_64(cpu_mailbox_addr, value); in gxl_pm_set_reset_addr()

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