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Searched refs:mid (Results 1 – 8 of 8) sorted by relevance

/rk3399_ARM-atf/plat/xilinx/common/include/
H A Dpm_api_sys.h57 #define PM_PACK_PAYLOAD1(pl, mid, flag, arg0) { \ argument
59 ((uint32_t)(mid) << 8U) | ((uint32_t)(flag) << 24U)); \
62 #define PM_PACK_PAYLOAD2(pl, mid, flag, arg0, arg1) { \ argument
64 PM_PACK_PAYLOAD1(pl, (mid), (flag), (arg0)); \
67 #define PM_PACK_PAYLOAD3(pl, mid, flag, arg0, arg1, arg2) { \ argument
69 PM_PACK_PAYLOAD2(pl, (mid), (flag), (arg0), (arg1)); \
72 #define PM_PACK_PAYLOAD4(pl, mid, flag, arg0, arg1, arg2, arg3) { \ argument
74 PM_PACK_PAYLOAD3(pl, (mid), (flag), (arg0), (arg1), (arg2)); \
77 #define PM_PACK_PAYLOAD5(pl, mid, flag, arg0, arg1, arg2, arg3, arg4) { \ argument
79 PM_PACK_PAYLOAD4(pl, (mid), (flag), (arg0), (arg1), (arg2), (arg3)); \
[all …]
/rk3399_ARM-atf/lib/extensions/ras/
H A Dras_common.c129 int start, end, mid, ret __unused; in ras_interrupt_handler() local
144 mid = ((end + start) / 2); in ras_interrupt_handler()
145 if (intr_raw == ras_inrs[mid].intr_number) { in ras_interrupt_handler()
146 selected = &ras_inrs[mid]; in ras_interrupt_handler()
148 } else if (intr_raw < ras_inrs[mid].intr_number) { in ras_interrupt_handler()
150 end = mid - 1; in ras_interrupt_handler()
153 start = mid + 1; in ras_interrupt_handler()
/rk3399_ARM-atf/lib/pmf/
H A Dpmf_main.c121 int mid; in get_service() local
133 mid = (low + high) / 2; in get_service()
134 index = pmf_svc_descs_indices[mid]; in get_service()
138 high = mid - 1; in get_service()
140 low = mid + 1; in get_service()
/rk3399_ARM-atf/plat/imx/common/include/
H A Dimx_caam.h54 struct caam_rtic_mid mid[CAAM_NUM_RTIC]; member
/rk3399_ARM-atf/fdts/
H A Dtc3.dts66 spe-pmu-mid {
H A Dtc4.dts64 spe-pmu-mid {
H A Dtc-base.dtsi237 cpu-pmu-mid {
328 spe-pmu-mid {
/rk3399_ARM-atf/docs/design/
H A Dfirmware-design.rst1525 the work and latency involved, the newer cores will "give up" mid way through if