History log of /rk3399_ARM-atf/plat/xilinx/common/include/pm_api_sys.h (Results 1 – 25 of 28)
Revision Date Author Comments
# 047b1b9a 14-Oct-2025 Joanna Farley <joanna.farley@arm.com>

Merge changes from topic "xlnx_remove_abort_suspend" into integration

* changes:
fix(versal-net): remove client-side code of PM_ABORT_SUSPEND
fix(versal): remove client-side implementation of PM

Merge changes from topic "xlnx_remove_abort_suspend" into integration

* changes:
fix(versal-net): remove client-side code of PM_ABORT_SUSPEND
fix(versal): remove client-side implementation of PM_ABORT_SUSPEND
fix(xilinx): remove PM_ABORT_SUSPEND API implementation
fix(zynqmp): remove PM_ABORT_SUSPEND API implementation
fix(versal2): remove PM_ABORT_SUSPEND API implementation

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# ecee0719 10-Oct-2025 Madhav Bhatt <madhav.bhatt@amd.com>

fix(xilinx): remove PM_ABORT_SUSPEND API implementation

The API is not getting called by Linux. Removing it to reduce dead
code and improve maintainability.

Note: This change removes code that is c

fix(xilinx): remove PM_ABORT_SUSPEND API implementation

The API is not getting called by Linux. Removing it to reduce dead
code and improve maintainability.

Note: This change removes code that is common between versal and
versal_net.

Change-Id: Ia7bfbcf2bbf80309beda7f8fa1ecf87de2591e2e
Signed-off-by: Madhav Bhatt <madhav.bhatt@amd.com>

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# 34b9b3a9 10-Oct-2025 Yann Gautier <yann.gautier@st.com>

Merge changes from topic "xlnx_enhance_tfa_feature_check" into integration

* changes:
chore(xilinx): add deprecation warning to pm_feature_check
refactor(xilinx): rename eemi_feature_check to tf

Merge changes from topic "xlnx_enhance_tfa_feature_check" into integration

* changes:
chore(xilinx): add deprecation warning to pm_feature_check
refactor(xilinx): rename eemi_feature_check to tfa_api_feature_check

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# e25fad87 03-Oct-2025 Devanshi Chauhan <devanshi.chauhan@amd.com>

refactor(xilinx): rename eemi_feature_check to tfa_api_feature_check

Rename eemi_feature_check() to tfa_api_feature_check() for better
clarity. The new name clearly indicates its purpose of handling

refactor(xilinx): rename eemi_feature_check to tfa_api_feature_check

Rename eemi_feature_check() to tfa_api_feature_check() for better
clarity. The new name clearly indicates its purpose of handling TF-A
specific feature checks and improves code maintainability.

Change-Id: Ia74b12933427ccadbc8ede5ddc2a7a4822766264
Signed-off-by: Devanshi Chauhan <devanshi.chauhan@amd.com>

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# a9040713 30-Sep-2025 Joanna Farley <joanna.farley@arm.com>

Merge "feat(xilinx): deprecate PM_REQ_SUSPEND EEMI API" into integration


# 93434bdd 09-Apr-2025 Ronak Jain <ronak.jain@amd.com>

feat(xilinx): deprecate PM_REQ_SUSPEND EEMI API

Deprecate the use of the PM_REQ_SUSPEND EEMI API from the Versal,
Versal-Net and Versal Gen 2 platforms. This is because the API is
intended for suspe

feat(xilinx): deprecate PM_REQ_SUSPEND EEMI API

Deprecate the use of the PM_REQ_SUSPEND EEMI API from the Versal,
Versal-Net and Versal Gen 2 platforms. This is because the API is
intended for suspending cross-subsystems, and the same functionality
can now be achieved using the ForcePowerdown API. Therefore,
continuing to use PM_REQ_SUSPEND API may no longer be necessary.
Hence deprecating the same.

Change-Id: I967d7803da4cf433fabfe8d87c32305954f69884
Signed-off-by: Ronak Jain <ronak.jain@amd.com>

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# c48c11e7 05-Sep-2025 Joanna Farley <joanna.farley@arm.com>

Merge changes I5fcf6578,Ic7792603 into integration

* changes:
fix(xilinx): fix missing security flag in suspend path
feat(zynqmp): mark IPI calls secure/non-secure


# 5cac1d85 20-Aug-2025 Ronak Jain <ronak.jain@amd.com>

fix(xilinx): fix missing security flag in suspend path

Suspend flow was always programming wakeup sources with a fixed
secure flag, regardless of whether the caller was secure or
non-secure. This ma

fix(xilinx): fix missing security flag in suspend path

Suspend flow was always programming wakeup sources with a fixed
secure flag, regardless of whether the caller was secure or
non-secure. This may cause incorrect behavior for non-secure
suspend requests.

Fix this by passing the caller's security state (flag) through
pm_client_suspend() and pm_client_set_wakeup_sources() to ensure
that wakeup sources are set with the correct context.

Fixes: <4697164a3fa8> ("plat: xilinx: versal: Mark IPI calls secure/non-secure")

Change-Id: I5fcf65788a54010b4759b0d08e4f54c6e5037e47
Signed-off-by: Ronak Jain <ronak.jain@amd.com>

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# bc11248a 26-May-2025 Joanna Farley <joanna.farley@arm.com>

Merge changes from topic "xlnx_versal_misra_fixes_series_3" into integration

* changes:
fix(xilinx): resolve misra rule 16.3 violations
fix(xilinx): resolve misra rule 2.5 violations
fix(xilin

Merge changes from topic "xlnx_versal_misra_fixes_series_3" into integration

* changes:
fix(xilinx): resolve misra rule 16.3 violations
fix(xilinx): resolve misra rule 2.5 violations
fix(xilinx): resolve misra rule 4.6 violations
fix(xilinx): resolve misra rule 12.2 violations
fix(xilinx): resolve misra rule 10.1 violations
fix(xilinx): resolve misra rule 8.13 violations
fix(xilinx): resolve misra rule 4.5 violations
fix(xilinx): resolve misra rule 16.4 violations

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# f78c5970 10-Apr-2025 Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>

fix(xilinx): resolve misra rule 12.2 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.12.2:
- The right hand operand of a shift operator shall lie in the range
zero to

fix(xilinx): resolve misra rule 12.2 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.12.2:
- The right hand operand of a shift operator shall lie in the range
zero to one less than the width in bits of the essential type of
the left hand operand.
- Fix:
- Type casted left operand to a larger width than shift.

Change-Id: I662ff57e52d1260e2f1a0de595f19a9143714892
Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>

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# c429afa2 02-May-2025 Joanna Farley <joanna.farley@arm.com>

Merge changes from topic "xlnx_versal_misra_fixes" into integration

* changes:
fix(xilinx): resolve misra rule 2.3 violations
fix(xilinx): resolve misra rule 2.7 violations
fix(xilinx): resolv

Merge changes from topic "xlnx_versal_misra_fixes" into integration

* changes:
fix(xilinx): resolve misra rule 2.3 violations
fix(xilinx): resolve misra rule 2.7 violations
fix(xilinx): resolve misra rule 8.6 violations
fix(xilinx): resolve misra rule 11.3 violations
fix(xilinx): resolve misra rule 2.2 violations
fix(xilinx): resolve misra rule 15.7 violations

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# eec03e94 21-Mar-2025 Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>

fix(xilinx): resolve misra rule 8.6 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.8.6:
- An identifier with external linkage shall have exactly one external
definit

fix(xilinx): resolve misra rule 8.6 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.8.6:
- An identifier with external linkage shall have exactly one external
definition.
- Fix:
- Removed redundant function declarations since it is not defined.

Change-Id: If003efbfa08ee6ff4f545605ef34dfd16f33b664
Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>

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# c35fe294 21-Mar-2025 Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>

fix(xilinx): resolve misra rule 11.3 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.11.3:
- A cast shall not be performed between a pointer to object type and a
poin

fix(xilinx): resolve misra rule 11.3 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.11.3:
- A cast shall not be performed between a pointer to object type and a
pointer to a different object type.
- Fix:
- Removed unnecessary cast of pointers.

Change-Id: Iba5dbec0784dcaa86e3a00bd213cbc2711d12029
Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>

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# 172fd24d 11-Apr-2025 Joanna Farley <joanna.farley@arm.com>

Merge changes from topic "xlnx_misra_fixes_versal" into integration

* changes:
fix(xilinx): resolve misra rule 8.3 violations
fix(xilinx): resolve misra rule 14.4 violation
fix(xilinx): resolv

Merge changes from topic "xlnx_misra_fixes_versal" into integration

* changes:
fix(xilinx): resolve misra rule 8.3 violations
fix(xilinx): resolve misra rule 14.4 violation
fix(xilinx): resolve misra rule 10.4 violations
fix(xilinx): resolve misra rule 10.3 violations

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# 3df32f85 18-Mar-2025 Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>

fix(xilinx): resolve misra rule 8.3 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.8.3:
- All declarations of an object or function shall use the same names
and type

fix(xilinx): resolve misra rule 8.3 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.8.3:
- All declarations of an object or function shall use the same names
and type qualifiers.
- Fix:
- Made same name parameters and type qualifiers in function declaration
and definition.

Change-Id: Idb4f986cec957102bb4ba1ef22f2e7937aaeb54d
Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>

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# 778e2452 12-Aug-2024 Joanna Farley <joanna.farley@arm.com>

Merge changes from topic "xlnx_tfa_passthrough_plm_ipi_cmd" into integration

* changes:
docs(xilinx): update SMC documentation in TF-A
feat(xilinx): add feature check function for TF-A specific

Merge changes from topic "xlnx_tfa_passthrough_plm_ipi_cmd" into integration

* changes:
docs(xilinx): update SMC documentation in TF-A
feat(xilinx): add feature check function for TF-A specific APIs
feat(xilinx): update SiP SVC version number
feat(xilinx): update TF-A to passthrough all PLM commands
fix(xilinx): fix logic to read ipi response

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# 9a0f5d12 01-Jul-2024 Jay Buddhabhatti <jay.buddhabhatti@amd.com>

feat(xilinx): add feature check function for TF-A specific APIs

Currently, there is common feature check function for firmware APIs
and TF-A specific APIs. This should be separate from firmware APIs

feat(xilinx): add feature check function for TF-A specific APIs

Currently, there is common feature check function for firmware APIs
and TF-A specific APIs. This should be separate from firmware APIs.
So add new TF-A API for feature check of TF-A specific APIs.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I5585d17fb6aa1e98989d935117cca10bdb85133e

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# 4661c8f5 24-Jun-2024 Jay Buddhabhatti <jay.buddhabhatti@amd.com>

feat(xilinx): update TF-A to passthrough all PLM commands

Currently, the IDs used in PLM CMD header are mixed with SMC IDs in
TF-A which is restricting the range of IDs that can be used by PLM.
Also

feat(xilinx): update TF-A to passthrough all PLM commands

Currently, the IDs used in PLM CMD header are mixed with SMC IDs in
TF-A which is restricting the range of IDs that can be used by PLM.
Also, the SMC call from firmware driver is passing all 7 32-bit
words in request but TF-A is not passing all of them to firmware and
TF-A passes only 4 32-bit words from firmware to Linux in response.

So, update TF-A to passthrough all PLM commands by having a single
fixed SMC ID for all PLM commands and keep the PLM header in subsequent
SMC arguments. Also, enhance size of payload argument count to support
maximum payloads in request and response buffers to transmit all the
IPI command properly.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I2601caba849bce3f294177b63baa1ad688e3c5bb

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# ab4e9c0b 06-Jun-2024 Joanna Farley <joanna.farley@arm.com>

Merge "feat(xilinx): remove PM_IOCTL and PM_QUERY_DATA APIs" into integration


# 924f8ce2 30-May-2024 Ronak Jain <ronak.jain@amd.com>

feat(xilinx): remove PM_IOCTL and PM_QUERY_DATA APIs

Today, the PM_IOCTL and PM_QUERY_DATA APIs are there to maintain
backward compatibility. Now, the usage of these APIs on the Linux
side and the f

feat(xilinx): remove PM_IOCTL and PM_QUERY_DATA APIs

Today, the PM_IOCTL and PM_QUERY_DATA APIs are there to maintain
backward compatibility. Now, the usage of these APIs on the Linux
side and the firmware side is updated. Hence remove the deprecated
PM_IOCTL and PM_QUERY_DATA EEMI API from the TF-A to make TF-A pass
through.

Note: Only use the newer kernel to access the deprecated features in
this patch. Otherwise, the system may not function correctly.

Change-Id: I23effb7ff62e7f83563c2b422ea64a0289fd880f
Signed-off-by: Ronak Jain <ronak.jain@amd.com>

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# f1b7a99a 23-Jun-2023 Joanna Farley <joanna.farley@arm.com>

Merge "chore(xilinx): follow kernel doc format for functional documentation" into integration


# de7ed953 09-Jun-2023 Prasad Kummari <prasad.kummari@amd.com>

chore(xilinx): follow kernel doc format for functional documentation

For TF-A, there is no format specified for functional documentation.
For AMD-Xilinx platforms, following kernel-doc format for th

chore(xilinx): follow kernel doc format for functional documentation

For TF-A, there is no format specified for functional documentation.
For AMD-Xilinx platforms, following kernel-doc format for the functional
documentation to make sure AMD-xilinx documentation is align with
actual code.

For example use kernel-doc from linux to call:
<linux>/scripts/kernel-doc -man -v 1 >/dev/null file...

Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Change-Id: Idcc9def408b6c8da35b36f67ef82fc00890e998c

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# 16cb3be8 24-May-2023 Joanna Farley <joanna.farley@arm.com>

Merge changes from topic "xlnx_smcc_soc_id" into integration

* changes:
feat(versal-net): add support for SMCC ARCH SOC ID
feat(versal): add support for SMCC ARCH SOC ID
refactor(versal-net):

Merge changes from topic "xlnx_smcc_soc_id" into integration

* changes:
feat(versal-net): add support for SMCC ARCH SOC ID
feat(versal): add support for SMCC ARCH SOC ID
refactor(versal-net): move macros to common header
feat(xilinx): add support to get chipid

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# 0563601f 03-Apr-2023 Akshay Belsare <akshay.belsare@amd.com>

feat(xilinx): add support to get chipid

Add support for PM API SYS to get the chip ID from the target.
The API calls the IPI command to read the Chip idcode and revision.

Change-Id: Id4d7d812cbf77c

feat(xilinx): add support to get chipid

Add support for PM API SYS to get the chip ID from the target.
The API calls the IPI command to read the Chip idcode and revision.

Change-Id: Id4d7d812cbf77c5e2fc7785b8afb379214f8dd19
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>

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# bf977aa1 28-Mar-2023 Joanna Farley <joanna.farley@arm.com>

Merge changes from topic "set-wake-source-for-versal-net" into integration

* changes:
refactor(xilinx): move enum to common place
fix(xilinx): fix misra defects
fix(xilinx): remove unnecessary

Merge changes from topic "set-wake-source-for-versal-net" into integration

* changes:
refactor(xilinx): move enum to common place
fix(xilinx): fix misra defects
fix(xilinx): remove unnecessary condition
feat(versal): replace irq array with switch case
feat(versal-net): add support for set wakeup source
refactor(versal): move set wake src fn to common place

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