| /rk3399_ARM-atf/drivers/st/ddr/phy/phyinit/src/ |
| H A D | ddrphy_phyinit_writeoutmem.c | 29 void ddrphy_phyinit_writeoutmem(uint32_t *mem, uint32_t mem_offset, uint32_t mem_size) in ddrphy_phyinit_writeoutmem() argument 41 uint32_t data = mem[index]; in ddrphy_phyinit_writeoutmem() 58 void ddrphy_phyinit_writeoutmsgblk(uint16_t *mem, uint32_t mem_offset, uint32_t mem_size) in ddrphy_phyinit_writeoutmsgblk() argument 70 mmio_write_16((uintptr_t)(DDRPHYC_BASE + (4U * (index + mem_offset))), mem[index]); in ddrphy_phyinit_writeoutmsgblk()
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| /rk3399_ARM-atf/fdts/ |
| H A D | stm32mp13-fw-config-mem-encrypt.dtsi | 9 st-mem-encrypt { 10 compatible = "st,mem-encrypt";
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| H A D | stm32mp15-ddr.dtsi | 7 st,mem-name = DDR_MEM_NAME; 8 st,mem-speed = <DDR_MEM_SPEED>; 9 st,mem-size = <DDR_MEM_SIZE>;
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| H A D | stm32mp25-fw-config.dtsi | 43 st-mem-firewall { 44 compatible = "st,stm32mp2-mem-firewall";
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| H A D | stm32mp13-fw-config.dtsi | 45 st-mem-firewall { 46 compatible = "st,mem-firewall";
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| H A D | stm32mp25-ddr.dtsi | 7 st,mem-name = DDR_MEM_NAME; 8 st,mem-speed = <DDR_MEM_SPEED>; 9 st,mem-size = <(DDR_MEM_SIZE >> 32) (DDR_MEM_SIZE & 0xFFFFFFFF)>;
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| H A D | stm32mp13-ddr.dtsi | 7 st,mem-name = DDR_MEM_NAME; 8 st,mem-speed = <DDR_MEM_SPEED>; 9 st,mem-size = <DDR_MEM_SIZE>;
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| H A D | stm32mp15-fw-config.dtsi | 64 st-mem-firewall { 65 compatible = "st,mem-firewall";
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| H A D | stm32mp135f-dk-fw-config.dts | 8 #include "stm32mp13-fw-config-mem-encrypt.dtsi"
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| H A D | stm32mp257f-ev1-ca35tdcid-fw-config.dtsi | 24 st-mem-firewall {
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| H A D | stm32mp257f-dk-ca35tdcid-fw-config.dtsi | 24 st-mem-firewall {
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| H A D | corstone700.dtsi | 100 compatible = "arm,armv7-timer-mem";
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| H A D | a5ds.dts | 126 compatible = "arm,armv7-timer-mem";
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| H A D | fvp-base-psci-common.dtsi | 106 compatible = "arm,armv7-timer-mem";
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| /rk3399_ARM-atf/include/lib/ |
| H A D | utils.h | 57 void zero_normalmem(void *mem, u_register_t length); 70 void zeromem(void *mem, u_register_t length);
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| /rk3399_ARM-atf/drivers/st/ddr/phy/phyinit/include/ |
| H A D | ddrphy_phyinit_usercustom.h | 107 void ddrphy_phyinit_writeoutmem(uint32_t *mem, uint32_t mem_offset, uint32_t mem_size); 108 void ddrphy_phyinit_writeoutmsgblk(uint16_t *mem, uint32_t mem_offset, uint32_t mem_size);
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| /rk3399_ARM-atf/tools/cert_create/src/ |
| H A D | ext.c | 284 BIO *mem = BIO_new(BIO_s_mem()); in ext_new_key() local 285 if (i2d_PUBKEY_bio(mem, k) <= 0) { in ext_new_key() 290 sz = BIO_read(mem, p, 4096); in ext_new_key() 296 BIO_free(mem); in ext_new_key()
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| /rk3399_ARM-atf/tools/memory/src/memory/ |
| H A D | elfparser.py | 67 for mem, attrs in self._memory_layout.items(): 68 self._footprint[mem] = Region( 171 for mem, attrs in self._memory_layout.items(): 172 mem_dict[mem] = Region(
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| H A D | printer.py | 86 for mem in sorted({k for v in app_mem_usage.values() for k in v}): 94 if mem in vals: 95 val = vals[mem]
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| /rk3399_ARM-atf/plat/imx/imx8ulp/scmi/ |
| H A D | scmi_pd.c | 316 uint64_t mem; in plat_scmi_pd_set_state() local 337 mem = scmi_power_domains[ps_idx].bits; in plat_scmi_pd_set_state() 348 ret = upwr_pwm_power(NULL, (const uint32_t *)&mem, on); in plat_scmi_pd_set_state() 357 ret = upwr_pwm_power(NULL, (const uint32_t *)&mem, on); in plat_scmi_pd_set_state()
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| /rk3399_ARM-atf/plat/imx/imx8ulp/upower/ |
| H A D | upower_api.h | 841 int upwr_pwm_mem_retain(const uint32_t mem[], upwr_callb callb); 901 const struct upwr_mem_switches_t mem[],
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| H A D | upower_api.c | 2363 int upwr_pwm_mem_retain(const uint32_t mem[], upwr_callb callb) in upwr_pwm_mem_retain() argument 2380 ptrval = (unsigned long)os_ptr2phy((void *)mem); in upwr_pwm_mem_retain() 2389 mem); in upwr_pwm_mem_retain() 2455 const struct upwr_mem_switches_t mem[], in upwr_pwm_chng_switch_mem() argument 2487 ptrval = (unsigned long)os_ptr2phy((void *)mem); in upwr_pwm_chng_switch_mem() 2488 if (mem == NULL) { in upwr_pwm_chng_switch_mem() 2497 mem); in upwr_pwm_chng_switch_mem()
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| /rk3399_ARM-atf/plat/arm/board/fvp/fdts/ |
| H A D | optee_sp_manifest.dts | 25 mem-size = <0xd80000>; /* OP-TEE specific extension */
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| /rk3399_ARM-atf/plat/intel/soc/common/fdts/ |
| H A D | agilex5_fdt.dts | 78 compatible = "arm,armv7-timer-mem";
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| /rk3399_ARM-atf/plat/intel/soc/common/ |
| H A D | socfpga_sip_svc.c | 330 static uint32_t intel_fpga_config_write(uint64_t mem, uint64_t size) in intel_fpga_config_write() argument 336 if (!is_address_in_ddr_range(mem, size) || in intel_fpga_config_write() 342 intel_smmu_hps_remapper_init(&mem); in intel_fpga_config_write() 349 fpga_config_buffers[j].addr = mem; in intel_fpga_config_write() 792 void intel_smmu_hps_remapper_init(uint64_t *mem) argument 801 *mem = *mem - DRAM_BASE; 803 *mem = *mem - DRAM_BASE;
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