| #
f7a92518 |
| 07-Jan-2022 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "st_ddr_updates" into integration
* changes: refactor(st-ddr): move basic tests in a dedicated file refactor(st-ddr): reorganize generic and specific elements feat(stm
Merge changes from topic "st_ddr_updates" into integration
* changes: refactor(st-ddr): move basic tests in a dedicated file refactor(st-ddr): reorganize generic and specific elements feat(stm32mp1): allow configuration of DDR AXI ports number refactor(st-ddr): update parameter array initialization feat(st-ddr): add read valid training support refactor(stm32mp1): remove the support of calibration result fix(st-ddr): correct DDR warnings
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| #
26cf5cf6 |
| 30-Apr-2021 |
Patrick Delaunay <patrick.delaunay@foss.st.com> |
refactor(stm32mp1): remove the support of calibration result
The support of a predefined DDR PHY tuning result is removed for STM32MP1 driver because it is not needed at the supported frequency when
refactor(stm32mp1): remove the support of calibration result
The support of a predefined DDR PHY tuning result is removed for STM32MP1 driver because it is not needed at the supported frequency when built-in calibration is executed.
The calibration parameters were provided in the device tree by the optional node "st,phy-cal", activated in ddr helper file by the compilation flag DDR_PHY_CAL_SKIP and filled with values generated by CubeMX.
This patch - updates the binding file to remove "st,phy-cal" support - updates the device trees and remove the associated defines - simplifies the STM32MP1 DDR driver and remove the support of the optional "st,phy-cal"
After this patch the built-in calibration is always executed.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Change-Id: I3fc445520c259f7f05730aefc25e64b328bf7159
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| #
fea7f369 |
| 29-Oct-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "st_dt_update" into integration
* changes: fix(fdts stm32mp1): update PLL nodes for ED1/EV1 boards fix(fdts stm32mp1): set ETH clock on PLL4P on ST boards feat(fdts st
Merge changes from topic "st_dt_update" into integration
* changes: fix(fdts stm32mp1): update PLL nodes for ED1/EV1 boards fix(fdts stm32mp1): set ETH clock on PLL4P on ST boards feat(fdts stm32mp1): delete nodes for non-used boot devices fix(fdts stm32mp1): use 'kHz' as kilohertz abbreviation refactor(fdts stm32mp1): move STM32MP DDR node feat(fdts stm32mp1): align DT with latest kernel
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| #
8cafbda6 |
| 25-Feb-2021 |
Nicolas Le Bayon <nicolas.le.bayon@foss.st.com> |
refactor(fdts stm32mp1): move STM32MP DDR node
Move the generic part of DDR node in SOC dtsi file. DDR dtsi files only include the part configured by CubeMX tool.
Signed-off-by: Patrick Delaunay <p
refactor(fdts stm32mp1): move STM32MP DDR node
Move the generic part of DDR node in SOC dtsi file. DDR dtsi files only include the part configured by CubeMX tool.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@foss.st.com> Change-Id: I8c211e9782604da32aeaab98d0ef75fb1cd9c58d
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| #
f15e7adb |
| 29-Apr-2019 |
Soby Mathew <soby.mathew@arm.com> |
Merge changes from topic "avenger96" into integration
* changes: fdts: Fix DTC warnings for STM32MP1 platform docs: plat: stm32mp1: Document the usage of DTB_FILE_NAME variable stm32mp1: Add A
Merge changes from topic "avenger96" into integration
* changes: fdts: Fix DTC warnings for STM32MP1 platform docs: plat: stm32mp1: Document the usage of DTB_FILE_NAME variable stm32mp1: Add Avenger96 board support
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| #
45875d91 |
| 26-Apr-2019 |
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> |
fdts: Fix DTC warnings for STM32MP1 platform
DTC issues below warnings for STM32MP1 platform for using upper case in unit address:
fdts/stm32mp15-ddr.dtsi:8.20-151.5: Warning (simple_bus_reg): /soc
fdts: Fix DTC warnings for STM32MP1 platform
DTC issues below warnings for STM32MP1 platform for using upper case in unit address:
fdts/stm32mp15-ddr.dtsi:8.20-151.5: Warning (simple_bus_reg): /soc/ddr@5A003000: simple-bus unit address format error, expected "5a003000" fdts/stm32mp157c-security.dtsi:9.25-13.5: Warning (simple_bus_reg): /soc/stgen@5C008000: simple-bus unit address format error, expected "5c008000"
Fix this by using the lower case unit address for concerned nodes.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Change-Id: Id3d19ac3b47ec6bcea2bd3382225e2e923dc4a70
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| #
fbf35335 |
| 21-Jan-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1767 from Yann-lms/updates_stm32mp1
Updates for STM32MP1
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| #
c948f771 |
| 17-Jan-2019 |
Yann Gautier <yann.gautier@st.com> |
stm32mp1: update device tree files
The drivers are also updated to reflect the changes. Set RCC as non-secure.
Change-Id: I568fa1f418355830ad1d4d1cdcdb910fb362231b Signed-off-by: Yann Gautier <yann
stm32mp1: update device tree files
The drivers are also updated to reflect the changes. Set RCC as non-secure.
Change-Id: I568fa1f418355830ad1d4d1cdcdb910fb362231b Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| #
d87d524e |
| 25-Jul-2018 |
danh-arm <dan.handley@arm.com> |
Merge pull request #1466 from Yann-lms/stm32mp1
Add STMicroelectronics STM32MP1 platform support
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| #
587f60fa |
| 05-Jul-2018 |
Yann Gautier <yann.gautier@st.com> |
stm32mp1: Add device tree files
Those device tree files are taken from STM32MP1 U-Boot and Linux. And they are updated to fit TF-A needs.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-of
stm32mp1: Add device tree files
Those device tree files are taken from STM32MP1 U-Boot and Linux. And they are updated to fit TF-A needs.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
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