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/rk3399_ARM-atf/drivers/mentor/i2c/
H A Dmi2cv.c73 reg = mmio_read_32((uintptr_t)&base->control); in mentor_i2c_interrupt_clear()
79 mmio_write_32((uintptr_t)&base->control, reg); in mentor_i2c_interrupt_clear()
89 reg = mmio_read_32((uintptr_t)&base->control); in mentor_i2c_interrupt_get()
115 mmio_write_32((uintptr_t)&base->control, in mentor_i2c_start_bit_set()
116 mmio_read_32((uintptr_t)&base->control) | in mentor_i2c_start_bit_set()
131 if ((mmio_read_32((uintptr_t)&base->control) & in mentor_i2c_start_bit_set()
158 mmio_write_32((uintptr_t)&base->control, in mentor_i2c_stop_bit_set()
159 mmio_read_32((uintptr_t)&base->control) | in mentor_i2c_stop_bit_set()
165 while ((mmio_read_32((uintptr_t)&base->control) & I2C_CONTROL_STOP) && in mentor_i2c_stop_bit_set()
174 if ((mmio_read_32((uintptr_t)&base->control) & I2C_CONTROL_STOP) != 0) { in mentor_i2c_stop_bit_set()
[all …]
/rk3399_ARM-atf/docs/resources/diagrams/plantuml/
H A Dfip-secure-partitions.puml60 control sp_mk_generator
71 control dtc
72 control sptool
124 control crttool
125 control fiptool
/rk3399_ARM-atf/tools/cot_dt2c/
H A D.gitignore95 # According to pypa/pipenv#598, it is recommended to include Pipfile.lock in version control.
102 # Similar to Pipfile.lock, it is generally recommended to include poetry.lock in version control.
105 # https://python-poetry.org/docs/basic-usage/#commit-your-poetrylock-file-to-version-control
109 # Similar to Pipfile.lock, it is generally recommended to include pdm.lock in version control.
112 # in version control.
/rk3399_ARM-atf/plat/allwinner/common/include/
H A Dmentor_i2c_plat.h22 uint32_t control; member
/rk3399_ARM-atf/plat/marvell/armada/a8k/common/include/
H A Dmentor_i2c_plat.h21 uint32_t control; member
/rk3399_ARM-atf/docs/plat/
H A Dallwinner.rst48 - ``SUNXI_PSCI_USE_NATIVE`` : Support direct control of the CPU cores powerdown
50 to be loaded into the ARISC SCP (A64, H5), or the power sequence control
52 control, like core on/off and system off/reset.
54 is detected at runtime, this control scheme will be ignored, and SCPI
57 - ``SUNXI_PSCI_USE_SCPI`` : Support control of the CPU cores powerdown and
68 software like U-Boot to ignore power control via the PMIC.
H A Ds32g274a.rst13 engineering for vehicle service-oriented gateway (SoG), domain control
102 control the workaround for the SoC. These flags are used similarly to how the
H A Dimx8.rst19 control for system-level resources on i.MX8. The heart of the system
/rk3399_ARM-atf/fdts/
H A Dstm32mp157a-avenger96.dts53 st,main-control-register = <0x04>;
54 st,vin-control-register = <0xc0>;
55 st,usb-control-register = <0x30>;
/rk3399_ARM-atf/tools/marvell/doimage/secure/
H A Dsec_img_8K.cfg29 control = [0xF2441920, 0xF2441940, 0xF4441920, 0xF4441940];
H A Dsec_img_7K.cfg29 control = [0xF2441920, 0xF2441940];
/rk3399_ARM-atf/drivers/brcm/emmc/
H A Demmc_chal_sd.c833 uint32_t control, flag; in chal_sd_reset_line() local
846 control = mmio_read_32(handle->ctrl.sdRegBaseAddr + in chal_sd_reset_line()
848 control |= line; in chal_sd_reset_line()
850 control); in chal_sd_reset_line()
854 control = mmio_read_32(handle->ctrl.sdRegBaseAddr + in chal_sd_reset_line()
856 } while (control & line); in chal_sd_reset_line()
/rk3399_ARM-atf/docs/design_documents/
H A Ddrtm_poc.rst36 signature, and transfers control to it.
41 and finally transfers control to the payload.
/rk3399_ARM-atf/docs/design/
H A Dalt-boot-flows.rst18 other BL images and passing control to BL31. It reduces the complexity of
57 moment for a debugger to take control of the target and load the payload (for
H A Dinterrupt-framework-design.rst10 (normal world). The framework should then take care of handing control of
13 that secure interrupts are under the control of the secure software with
100 control of handling secure interrupts.
122 software is in control of how its execution is preempted by non-secure
148 in Secure-EL1/Secure-EL0 is in control of how its execution is preempted
223 #. Implementing support to hand control of an interrupt type to its
413 The SPD should determine the mechanism to pass control to the Secure Payload
446 #. It passes control to the Test Secure Payload to perform its
449 interrupts in the ``sel1_intr_entry`` field. The TSPD passes control to the TSP at
733 priorities before handing control to the SP.
[all …]
/rk3399_ARM-atf/docs/plat/arm/morello/
H A Dindex.rst23 AP_BL2 then transfers execution control to AP_BL31, which is the EL3 runtime
/rk3399_ARM-atf/licenses/
H A DLICENSE-APACHE-2.0.txt17 other entities that control, are controlled by, or are under common
18 control with that entity. For the purposes of this definition,
19 "control" means (i) the power, direct or indirect, to cause the
57 communication on electronic mailing lists, source code control systems,
/rk3399_ARM-atf/docs/getting_started/
H A Dimage-terminology.rst58 location, then hand-off control to that image.
66 executable RAM locations, then hand-off control to the EL3 Runtime Firmware.
118 location, then hand-off control to that image. This may be performed in
/rk3399_ARM-atf/docs/components/
H A Drealm-management-extension.rst53 3. BL2 transfers control to BL31
56 6. BL31 transfers control to Normal-world software
/rk3399_ARM-atf/docs/
H A Darchitecture_features.rst5 almost every year listed in `Feature_description`_. While most of these features require no control
6 at EL3, some demand explicit configuration of EL3 control registers to enable their use at lower
544 - If the feature introduces any control bits in ``SCR_EL3``, ``MDCR_EL3``,
H A Dglossary.rst30 control flow integrity around indirect branches and their targets.
/rk3399_ARM-atf/docs/security_advisories/
H A Dsecurity-advisory-tfv-2.rst41 A similar issue applies to the ``MDCR_EL3.SPD32`` bits, which control AArch32
H A Dsecurity-advisory-tfv-3.rst29 contains flags to control data access permissions (``MT_RO``/``MT_RW``) and
H A Dsecurity-advisory-tfv-9.rst49 code is under attacker control.
/rk3399_ARM-atf/docs/plat/arm/fvp/
H A Dfvp-support.rst86 CADI-compliant debugger (for example, Arm DS-5) can connect to and control

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