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Searched refs:bl32_ep_info (Results 1 – 25 of 35) sorted by relevance

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/rk3399_ARM-atf/plat/mediatek/mt8186/
H A Dbl31_plat_setup.c28 static entry_point_info_t bl32_ep_info; variable
41 next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info; in bl31_plat_get_next_image_ep_info()
80 bl31_params_parse_helper(arg0, &bl32_ep_info, &bl33_ep_info); in bl31_early_platform_setup2()
/rk3399_ARM-atf/plat/mediatek/mt8195/
H A Dbl31_plat_setup.c28 static entry_point_info_t bl32_ep_info; variable
41 next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info; in bl31_plat_get_next_image_ep_info()
80 bl31_params_parse_helper(arg0, &bl32_ep_info, &bl33_ep_info); in bl31_early_platform_setup2()
/rk3399_ARM-atf/plat/rockchip/common/
H A Dbl31_plat_setup.c21 static entry_point_info_t bl32_ep_info; variable
34 next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info; in bl31_plat_get_next_image_ep_info()
71 bl31_params_parse_helper(arg0, &bl32_ep_info, &bl33_ep_info); in bl31_early_platform_setup2()
/rk3399_ARM-atf/plat/mediatek/mt8192/
H A Dbl31_plat_setup.c29 static entry_point_info_t bl32_ep_info; variable
42 next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info; in bl31_plat_get_next_image_ep_info()
81 bl31_params_parse_helper(arg0, &bl32_ep_info, &bl33_ep_info); in bl31_early_platform_setup2()
/rk3399_ARM-atf/plat/aspeed/ast2700/
H A Dplat_bl31_setup.c21 static entry_point_info_t bl32_ep_info; variable
60 SET_PARAM_HEAD(&bl32_ep_info, PARAM_EP, VERSION_2, 0); in bl31_early_platform_setup2()
61 bl32_ep_info.pc = BL32_BASE; in bl31_early_platform_setup2()
62 SET_SECURITY_STATE(bl32_ep_info.h.attr, SECURE); in bl31_early_platform_setup2()
108 ep_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info; in bl31_plat_get_next_image_ep_info()
/rk3399_ARM-atf/plat/mediatek/mt8173/
H A Dbl31_plat_setup.c25 static entry_point_info_t bl32_ep_info; variable
82 next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info; in bl31_plat_get_next_image_ep_info()
109 bl31_params_parse_helper(arg0, &bl32_ep_info, &bl33_ep_info); in bl31_early_platform_setup2()
/rk3399_ARM-atf/plat/mediatek/common/
H A Dmtk_bl31_setup.c40 static entry_point_info_t bl32_ep_info; variable
53 next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info; in bl31_plat_get_next_image_ep_info()
120 bl31_params_parse_helper(from_bl2, &bl32_ep_info, &bl33_ep_info); in bl31_early_platform_setup2()
H A Dmtk_plat_common.h25 entry_point_info_t *bl32_ep_info; member
/rk3399_ARM-atf/plat/hisilicon/hikey/
H A Dhikey_bl31_setup.c28 static entry_point_info_t bl32_ep_info; variable
64 next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info; in bl31_plat_get_next_image_ep_info()
103 bl32_ep_info = *bl_params->ep_info; in bl31_early_platform_setup2()
/rk3399_ARM-atf/plat/mediatek/mt8183/
H A Dbl31_plat_setup.c33 static entry_point_info_t bl32_ep_info; variable
95 next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info; in bl31_plat_get_next_image_ep_info()
132 bl31_params_parse_helper(arg0, &bl32_ep_info, &bl33_ep_info); in bl31_early_platform_setup2()
/rk3399_ARM-atf/plat/nvidia/tegra/soc/t186/
H A Dplat_setup.c327 const entry_point_info_t *bl32_ep_info = bl31_plat_get_next_image_ep_info(SECURE); in plat_relocate_bl32_image() local
330 if ((bl32_img_info != NULL) && (bl32_ep_info != NULL)) { in plat_relocate_bl32_image()
341 assert(bl32_ep_info->pc > tzdram_start); in plat_relocate_bl32_image()
342 assert(bl32_ep_info->pc < tzdram_end); in plat_relocate_bl32_image()
349 (void)memcpy16((void *)(uintptr_t)bl32_ep_info->pc, in plat_relocate_bl32_image()
/rk3399_ARM-atf/plat/hisilicon/hikey960/
H A Dhikey960_bl31_setup.c32 static entry_point_info_t bl32_ep_info; variable
66 next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info; in bl31_plat_get_next_image_ep_info()
118 bl32_ep_info = *bl_params->ep_info; in bl31_early_platform_setup2()
/rk3399_ARM-atf/plat/amlogic/g12a/
H A Dg12a_bl31_setup.c58 entry_point_info_t *bl32_ep_info; member
84 bl32_image_ep_info = *from_bl2->bl32_ep_info; in bl31_early_platform_setup2()
/rk3399_ARM-atf/plat/nvidia/tegra/common/
H A Dtegra_bl31_setup.c119 if (arg_from_bl2->bl32_ep_info != NULL) { in bl31_early_platform_setup2()
120 bl32_image_ep_info = *arg_from_bl2->bl32_ep_info; in bl31_early_platform_setup2()
123 memcpy(&bl32_args, &arg_from_bl2->bl32_ep_info->args, sizeof(bl32_args)); in bl31_early_platform_setup2()
/rk3399_ARM-atf/plat/amlogic/axg/
H A Daxg_bl31_setup.c58 entry_point_info_t *bl32_ep_info; member
84 bl32_image_ep_info = *from_bl2->bl32_ep_info; in bl31_early_platform_setup2()
/rk3399_ARM-atf/plat/renesas/rcar_gen4/include/
H A Drcar_private.h26 entry_point_info_t bl32_ep_info; member
/rk3399_ARM-atf/docs/components/spd/
H A Dtlk-dispatcher.rst74 bl32_ep_info->args.arg0 = TZDRAM size available for BL32
75 bl32_ep_info->args.arg1 = unused (used only on Armv7-A)
76 bl32_ep_info->args.arg2 = pointer to boot args
/rk3399_ARM-atf/plat/renesas/common/include/
H A Drcar_private.h29 entry_point_info_t bl32_ep_info; member
/rk3399_ARM-atf/plat/renesas/rcar_gen4/
H A Dbl31_plat_setup.c35 &from_bl2->bl32_ep_info; in bl31_plat_get_next_image_ep_info()
/rk3399_ARM-atf/include/plat/marvell/armada/a8k/common/
H A Dplat_marvell.h32 entry_point_info_t *bl32_ep_info; member
/rk3399_ARM-atf/plat/renesas/rcar_gen5/include/
H A Drcar_private.h29 entry_point_info_t bl32_ep_info; member
/rk3399_ARM-atf/plat/renesas/common/
H A Dbl31_plat_setup.c76 &from_bl2->bl33_ep_info : &from_bl2->bl32_ep_info; in bl31_plat_get_next_image_ep_info()
/rk3399_ARM-atf/plat/nxp/common/setup/include/
H A Dplat_common.h39 entry_point_info_t *bl32_ep_info; member
/rk3399_ARM-atf/plat/amlogic/gxbb/
H A Dgxbb_bl31_setup.c56 entry_point_info_t *bl32_ep_info; member
/rk3399_ARM-atf/common/
H A Ddesc_image_load.c348 entry_point_info_t *bl32_ep_info; in bl31_params_parse_helper() member
355 *bl32_ep_info_out = *v1->bl32_ep_info; in bl31_params_parse_helper()

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