xref: /rk3399_ARM-atf/plat/rockchip/common/bl31_plat_setup.c (revision fe4df8bdae0a5d1d87c67c24fdd03595cd90dd08)
16fba6e04STony Xie /*
2*9fd9f1d0Sshengfei Xu  * Copyright (c) 2016-2023, ARM Limited and Contributors. All rights reserved.
36fba6e04STony Xie  *
482cb2c1aSdp-arm  * SPDX-License-Identifier: BSD-3-Clause
56fba6e04STony Xie  */
66fba6e04STony Xie 
76fba6e04STony Xie #include <assert.h>
809d40e0eSAntonio Nino Diaz 
96fba6e04STony Xie #include <platform_def.h>
1009d40e0eSAntonio Nino Diaz 
1109d40e0eSAntonio Nino Diaz #include <common/bl_common.h>
1209d40e0eSAntonio Nino Diaz #include <common/debug.h>
133e02c743SJulius Werner #include <common/desc_image_load.h>
1409d40e0eSAntonio Nino Diaz #include <drivers/console.h>
1509d40e0eSAntonio Nino Diaz #include <drivers/generic_delay_timer.h>
1609d40e0eSAntonio Nino Diaz #include <drivers/ti/uart/uart_16550.h>
1709d40e0eSAntonio Nino Diaz #include <lib/mmio.h>
1809d40e0eSAntonio Nino Diaz #include <plat_private.h>
1909d40e0eSAntonio Nino Diaz #include <plat/common/platform.h>
206fba6e04STony Xie 
216fba6e04STony Xie static entry_point_info_t bl32_ep_info;
226fba6e04STony Xie static entry_point_info_t bl33_ep_info;
236fba6e04STony Xie 
246fba6e04STony Xie /*******************************************************************************
256fba6e04STony Xie  * Return a pointer to the 'entry_point_info' structure of the next image for
266fba6e04STony Xie  * the security state specified. BL33 corresponds to the non-secure image type
276fba6e04STony Xie  * while BL32 corresponds to the secure image type. A NULL pointer is returned
286fba6e04STony Xie  * if the image does not exist.
296fba6e04STony Xie  ******************************************************************************/
bl31_plat_get_next_image_ep_info(uint32_t type)306fba6e04STony Xie entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
316fba6e04STony Xie {
326fba6e04STony Xie 	entry_point_info_t *next_image_info;
336fba6e04STony Xie 
346fba6e04STony Xie 	next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info;
353e02c743SJulius Werner 	assert(next_image_info->h.type == PARAM_EP);
366fba6e04STony Xie 
376fba6e04STony Xie 	/* None of the images on this platform can have 0x0 as the entrypoint */
386fba6e04STony Xie 	if (next_image_info->pc)
396fba6e04STony Xie 		return next_image_info;
406fba6e04STony Xie 	else
416fba6e04STony Xie 		return NULL;
426fba6e04STony Xie }
436fba6e04STony Xie 
440d5ec955Stony.xie #pragma weak params_early_setup
params_early_setup(u_register_t plat_param_from_bl2)45c1185ffdSJulius Werner void params_early_setup(u_register_t plat_param_from_bl2)
460d5ec955Stony.xie {
470d5ec955Stony.xie }
480d5ec955Stony.xie 
496fba6e04STony Xie /*******************************************************************************
506fba6e04STony Xie  * Perform any BL3-1 early platform setup. Here is an opportunity to copy
51a6238326SJohn Tsichritzis  * parameters passed by the calling EL (S-EL1 in BL2 & EL3 in BL1) before they
526fba6e04STony Xie  * are lost (potentially). This needs to be done before the MMU is initialized
536fba6e04STony Xie  * so that the memory layout can be used while creating page tables.
546fba6e04STony Xie  * BL2 has flushed this information to memory, so we are guaranteed to pick up
556fba6e04STony Xie  * good data.
566fba6e04STony Xie  ******************************************************************************/
bl31_early_platform_setup2(u_register_t arg0,u_register_t arg1,u_register_t arg2,u_register_t arg3)572d6f1f01SAntonio Nino Diaz void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
582d6f1f01SAntonio Nino Diaz 				u_register_t arg2, u_register_t arg3)
596fba6e04STony Xie {
6098964f05SAndre Przywara 	static console_t console;
61890abc33SJulius Werner 
62c1185ffdSJulius Werner 	params_early_setup(arg1);
633c250b9aSJulius Werner 
64dd4a0d16SHeiko Stuebner 	if (rockchip_get_uart_base() != 0)
65dd4a0d16SHeiko Stuebner 		console_16550_register(rockchip_get_uart_base(),
66dd4a0d16SHeiko Stuebner 				       rockchip_get_uart_clock(),
6730970e0fSHeiko Stuebner 				       rockchip_get_uart_baudrate(), &console);
686fba6e04STony Xie 
696fba6e04STony Xie 	VERBOSE("bl31_setup\n");
706fba6e04STony Xie 
713e02c743SJulius Werner 	bl31_params_parse_helper(arg0, &bl32_ep_info, &bl33_ep_info);
726fba6e04STony Xie }
736fba6e04STony Xie 
746fba6e04STony Xie /*******************************************************************************
756fba6e04STony Xie  * Perform any BL3-1 platform setup code
766fba6e04STony Xie  ******************************************************************************/
bl31_platform_setup(void)776fba6e04STony Xie void bl31_platform_setup(void)
786fba6e04STony Xie {
796704f425SAntonio Nino Diaz 	generic_delay_timer_init();
806fba6e04STony Xie 	plat_rockchip_soc_init();
816fba6e04STony Xie 
826fba6e04STony Xie 	/* Initialize the gic cpu and distributor interfaces */
836fba6e04STony Xie 	plat_rockchip_gic_driver_init();
846fba6e04STony Xie 	plat_rockchip_gic_init();
856fba6e04STony Xie 	plat_rockchip_pmu_init();
866fba6e04STony Xie }
876fba6e04STony Xie 
886fba6e04STony Xie /*******************************************************************************
896fba6e04STony Xie  * Perform the very early platform specific architectural setup here. At the
901b491eeaSElyes Haouas  * moment this is only initializes the mmu in a quick and dirty way.
916fba6e04STony Xie  ******************************************************************************/
bl31_plat_arch_setup(void)926fba6e04STony Xie void bl31_plat_arch_setup(void)
936fba6e04STony Xie {
946fba6e04STony Xie 	plat_cci_init();
956fba6e04STony Xie 	plat_cci_enable();
96*9fd9f1d0Sshengfei Xu #if USE_COHERENT_MEM
973e6945e9SHeiko Stuebner 	plat_configure_mmu_el3(BL_CODE_BASE,
983e6945e9SHeiko Stuebner 			       BL_COHERENT_RAM_END - BL_CODE_BASE,
993e6945e9SHeiko Stuebner 			       BL_CODE_BASE,
1003e6945e9SHeiko Stuebner 			       BL_CODE_END,
10147497053SMasahiro Yamada 			       BL_COHERENT_RAM_BASE,
10247497053SMasahiro Yamada 			       BL_COHERENT_RAM_END);
103*9fd9f1d0Sshengfei Xu #else
104*9fd9f1d0Sshengfei Xu 	plat_configure_mmu_el3(BL31_START,
105*9fd9f1d0Sshengfei Xu 			       BL31_END - BL31_START,
106*9fd9f1d0Sshengfei Xu 			       BL_CODE_BASE,
107*9fd9f1d0Sshengfei Xu 			       BL_CODE_END,
108*9fd9f1d0Sshengfei Xu 			       0,
109*9fd9f1d0Sshengfei Xu 			       0);
110*9fd9f1d0Sshengfei Xu #endif
1116fba6e04STony Xie }
112