| /rk3399_ARM-atf/bl31/ |
| H A D | bl31.ld.S | 40 ASSERT(. == ALIGN(PAGE_SIZE), 47 ASSERT(. == ALIGN(PAGE_SIZE), 57 . = ALIGN(PAGE_SIZE); 78 . = ALIGN(PAGE_SIZE); 84 ASSERT(. == ALIGN(PAGE_SIZE), 108 . = ALIGN(PAGE_SIZE); 131 .spm_shim_exceptions : ALIGN(PAGE_SIZE) { 136 . = ALIGN(PAGE_SIZE); 148 ASSERT(BL31_RWDATA_BASE == ALIGN(PAGE_SIZE), 162 . = ALIGN(PAGE_SIZE); [all …]
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| /rk3399_ARM-atf/plat/rockchip/rk3399/include/ |
| H A D | plat.ld.S | 19 ASSERT(. == ALIGN(PAGE_SIZE), 32 .incbin_sram : ALIGN(PAGE_SIZE) { 36 . = ALIGN(PAGE_SIZE); 42 .text_sram : ALIGN(PAGE_SIZE) { 47 . = ALIGN(PAGE_SIZE); 53 .data_sram : ALIGN(PAGE_SIZE) { 57 . = ALIGN(PAGE_SIZE); 63 .stack_sram : ALIGN(PAGE_SIZE) { 65 . += PAGE_SIZE;
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| /rk3399_ARM-atf/plat/rockchip/rk3288/include/ |
| H A D | plat_sp_min.ld.S | 19 ASSERT(. == ALIGN(PAGE_SIZE), 22 .text_sram : ALIGN(PAGE_SIZE) { 27 . = ALIGN(PAGE_SIZE); 33 .data_sram : ALIGN(PAGE_SIZE) { 37 . = ALIGN(PAGE_SIZE); 43 .stack_sram : ALIGN(PAGE_SIZE) { 45 . += PAGE_SIZE;
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| /rk3399_ARM-atf/bl32/tsp/ |
| H A D | tsp.ld.S | 23 ASSERT(. == ALIGN(PAGE_SIZE), 28 ASSERT(. == ALIGN(PAGE_SIZE), 38 . = ALIGN(PAGE_SIZE); 51 . = ALIGN(PAGE_SIZE); 57 ASSERT(. == ALIGN(PAGE_SIZE), 77 . = ALIGN(PAGE_SIZE); 103 .coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) { 113 . = ALIGN(PAGE_SIZE);
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| H A D | tsp_ffa_main.c | 32 uint8_t mem_region_buffer[4096 * 2] __aligned(PAGE_SIZE); 35 static uint8_t send_page[PAGE_SIZE] __aligned(PAGE_SIZE); 36 static uint8_t recv_page[PAGE_SIZE] __aligned(PAGE_SIZE); 157 frag_length > (mailbox.rxtx_page_count * PAGE_SIZE)) { in test_memory_send() 189 composite->address_range_array[0].page_count, PAGE_SIZE); in test_memory_send() 206 size_t size = composite->address_range_array[i].page_count * PAGE_SIZE; in test_memory_send() 224 composite->address_range_array[i].page_count * PAGE_SIZE); in test_memory_send() 250 composite->address_range_array[i].page_count * PAGE_SIZE); in test_memory_send()
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| /rk3399_ARM-atf/bl2u/ |
| H A D | bl2u.ld.S | 25 ASSERT(. == ALIGN(PAGE_SIZE), 30 ASSERT(. == ALIGN(PAGE_SIZE), 40 . = ALIGN(PAGE_SIZE); 61 . = ALIGN(PAGE_SIZE); 66 ASSERT(. == ALIGN(PAGE_SIZE), 86 . = ALIGN(PAGE_SIZE); 106 .coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) { 116 . = ALIGN(PAGE_SIZE);
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| /rk3399_ARM-atf/bl2/ |
| H A D | bl2_el3.ld.S | 42 ASSERT(. == ALIGN(PAGE_SIZE), 47 ASSERT(. == ALIGN(PAGE_SIZE), 58 ASSERT(. == ALIGN(PAGE_SIZE), 73 . = ALIGN(PAGE_SIZE); 86 . = ALIGN(PAGE_SIZE); 91 ASSERT(__TEXT_RESIDENT_END__ - __TEXT_RESIDENT_START__ <= PAGE_SIZE, 95 ASSERT(. == ALIGN(PAGE_SIZE), 120 . = ALIGN(PAGE_SIZE); 136 ASSERT(BL2_RW_BASE == ALIGN(PAGE_SIZE), 175 .coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) { [all …]
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| H A D | bl2.ld.S | 23 ASSERT(. == ALIGN(PAGE_SIZE), 28 ASSERT(. == ALIGN(PAGE_SIZE), 39 . = ALIGN(PAGE_SIZE); 61 . = ALIGN(PAGE_SIZE); 67 ASSERT(. == ALIGN(PAGE_SIZE), 87 . = ALIGN(PAGE_SIZE); 107 .coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) { 117 . = ALIGN(PAGE_SIZE);
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| /rk3399_ARM-atf/bl32/sp_min/ |
| H A D | sp_min.ld.S | 28 ASSERT(. == ALIGN(PAGE_SIZE), 33 ASSERT(. == ALIGN(PAGE_SIZE), 43 . = ALIGN(PAGE_SIZE); 68 . = ALIGN(PAGE_SIZE); 74 ASSERT(. == ALIGN(PAGE_SIZE), 98 . = ALIGN(PAGE_SIZE); 130 .coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) { 147 . = ALIGN(PAGE_SIZE);
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| /rk3399_ARM-atf/include/lib/xlat_tables/aarch64/ |
| H A D | xlat_tables_aarch64.h | 14 #if !defined(PAGE_SIZE) 33 #if PAGE_SIZE == PAGE_SIZE_4KB 35 #elif (PAGE_SIZE == PAGE_SIZE_16KB) || (PAGE_SIZE == PAGE_SIZE_64KB)
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| /rk3399_ARM-atf/bl1/ |
| H A D | bl1.ld.S | 34 ASSERT(. == ALIGN(PAGE_SIZE), 39 ASSERT(. == ALIGN(PAGE_SIZE), 49 . = ALIGN(PAGE_SIZE); 86 ASSERT(. == ALIGN(PAGE_SIZE), 116 ASSERT(BL1_RW_BASE == ALIGN(PAGE_SIZE), 137 .coherent_ram (NOLOAD) : ALIGN(PAGE_SIZE) { 147 . = ALIGN(PAGE_SIZE);
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| /rk3399_ARM-atf/include/plat/arm/common/ |
| H A D | arm_tzc_dram.ld.S | 18 ASSERT(. == ALIGN(PAGE_SIZE), 20 .el3_tzc_dram (NOLOAD) : ALIGN(PAGE_SIZE) { 28 . = ALIGN(PAGE_SIZE);
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| H A D | arm_reclaim_init.ld.S | 13 . = ALIGN(PAGE_SIZE); 17 INIT_CODE_END_ALIGNED = ALIGN(PAGE_SIZE); 40 . = ALIGN(PAGE_SIZE); \
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| H A D | arm_spm_def.h | 37 PAGE_SIZE) 57 PAGE_SIZE) 79 PAGE_SIZE) 105 PAGE_SIZE)
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| /rk3399_ARM-atf/plat/arm/board/fvp/include/ |
| H A D | plat.ld.S | 18 ASSERT(. == ALIGN(PAGE_SIZE), 20 .el3_tzc_dram (NOLOAD) : ALIGN(PAGE_SIZE) { 32 . = ALIGN(PAGE_SIZE);
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| /rk3399_ARM-atf/plat/qemu/qemu_sbsa/include/ |
| H A D | platform_def.h | 169 #define TB_FW_CONFIG_SIZE PAGE_SIZE 175 #define TOS_FW_CONFIG_SIZE PAGE_SIZE 331 PAGE_SIZE) 351 PAGE_SIZE) 369 PAGE_SIZE) 391 PAGE_SIZE) 438 #define PLAT_QEMU_L0_GPT_SIZE (8 * PAGE_SIZE) 468 #define PLAT_QEMU_RMM_SHARED_SIZE (PAGE_SIZE) /* 4KB */
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| /rk3399_ARM-atf/plat/arm/board/juno/ |
| H A D | juno_el3_spmc.c | 13 __section(".arm_el3_tzc_dram") __unused static uint8_t plat_spmc_shmem_datastore[PAGE_SIZE]; 18 *size = PAGE_SIZE; in plat_spmc_shmem_datastore_get()
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| /rk3399_ARM-atf/include/lib/xlat_tables/aarch32/ |
| H A D | xlat_tables_aarch32.h | 14 #if !defined(PAGE_SIZE) 27 #if PAGE_SIZE != PAGE_SIZE_4KB
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| /rk3399_ARM-atf/plat/rockchip/rk3576/include/ |
| H A D | plat.ld.S | 29 . = ALIGN(PAGE_SIZE); 33 . = ALIGN(PAGE_SIZE);
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| /rk3399_ARM-atf/plat/rockchip/rk3588/include/ |
| H A D | plat.ld.S | 30 . = ALIGN(PAGE_SIZE); 34 . = ALIGN(PAGE_SIZE);
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| /rk3399_ARM-atf/include/plat/common/ |
| H A D | common_def.h | 140 #define BL1_RO_DATA_END round_up(BL1_ROM_END, PAGE_SIZE) 144 #define BL2_RO_DATA_END round_up(BL2_ROM_END, PAGE_SIZE) 149 #define BL1_CODE_END round_up(BL1_ROM_END, PAGE_SIZE) 153 #define BL2_CODE_END round_up(BL2_ROM_END, PAGE_SIZE)
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| /rk3399_ARM-atf/plat/socionext/synquacer/include/ |
| H A D | platform_def.h | 139 MT_USER, PAGE_SIZE) 147 MT_USER, PAGE_SIZE) 157 MT_USER, PAGE_SIZE) 167 MT_USER, PAGE_SIZE)
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| /rk3399_ARM-atf/plat/socionext/synquacer/ |
| H A D | sq_xlat_setup.c | 28 round_up(BL_CODE_END, PAGE_SIZE) - BL_CODE_BASE, in sq_mmap_setup() 35 round_up(BL_RO_DATA_END, PAGE_SIZE) - BL_RO_DATA_BASE, in sq_mmap_setup()
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| /rk3399_ARM-atf/plat/arm/board/corstone700/common/include/ |
| H A D | platform_def.h | 77 #define BL32_BASE (ARM_BL_RAM_BASE + PAGE_SIZE) 93 #define ARM_FW_CONFIG_LIMIT (ARM_BL_RAM_BASE + (PAGE_SIZE / 2U)) 100 + (PAGE_SIZE / 2U)) 106 #define ARM_FW_CONFIGS_LIMIT (ARM_BL_RAM_BASE + (PAGE_SIZE * 2))
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| /rk3399_ARM-atf/plat/socionext/uniphier/ |
| H A D | uniphier_xlat_setup.c | 42 round_up(BL_END, PAGE_SIZE) - BL_CODE_BASE, in uniphier_mmap_setup() 49 round_up(BL_CODE_END, PAGE_SIZE) - BL_CODE_BASE, in uniphier_mmap_setup()
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