| #
e1362231 |
| 12-Feb-2025 |
Soby Mathew <soby.mathew@arm.com> |
Merge changes from topic "memory_bank" into integration
* changes: fix(qemu): statically allocate bitlocks array feat(qemu): update for renamed struct memory_bank feat(fvp): increase GPT PPS t
Merge changes from topic "memory_bank" into integration
* changes: fix(qemu): statically allocate bitlocks array feat(qemu): update for renamed struct memory_bank feat(fvp): increase GPT PPS to 1TB feat(gpt): statically allocate bitlocks array chore(gpt): define PPS in platform header files feat(fvp): allocate L0 GPT at the top of SRAM feat(fvp): change size of PCIe memory region 2 feat(rmm): add PCIe IO info to Boot manifest feat(fvp): define single Root region
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| #
a32a77f9 |
| 11-Feb-2025 |
Jean-Philippe Brucker <jean-philippe@linaro.org> |
fix(qemu): statically allocate bitlocks array
gpt_runtime_init() now takes the bitlock array's address and size as argument. Rather than reserving space at the end of the L0 GPT for storing bitlocks
fix(qemu): statically allocate bitlocks array
gpt_runtime_init() now takes the bitlock array's address and size as argument. Rather than reserving space at the end of the L0 GPT for storing bitlocks, allocate a static array and pass its address to gpt_runtime_init(). This frees up a little bit of space formerly reserved for alignment of the GPT.
Change-Id: I48a1a2bc230f64e13e3ed08b18ebdc2d387d77d0 Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
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| #
ac07f3ab |
| 22-Jan-2025 |
AlexeiFedorov <Alexei.Fedorov@arm.com> |
chore(gpt): define PPS in platform header files
Define protected physical address size in bytes PLAT_ARM_PPS macro for FVP and RDV3 in platform_def.h files.
Change-Id: I7f6529dfbb8df864091fbefc0813
chore(gpt): define PPS in platform header files
Define protected physical address size in bytes PLAT_ARM_PPS macro for FVP and RDV3 in platform_def.h files.
Change-Id: I7f6529dfbb8df864091fbefc08131a0e6d689eb6 Signed-off-by: AlexeiFedorov <Alexei.Fedorov@arm.com>
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d54e6696 |
| 04-Jan-2024 |
Manish V Badarkhe <manish.badarkhe@arm.com> |
Merge "feat(platforms): update SZ_* macros" into integration
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6d511a8c |
| 03-Jan-2024 |
Yann Gautier <yann.gautier@st.com> |
feat(platforms): update SZ_* macros
Use unsigned long values for __aarch64__ version of SZ_* macros. This allows using masks with ~SZ_* without losing the 32 upper bits.
Signed-off-by: Yann Gautier
feat(platforms): update SZ_* macros
Use unsigned long values for __aarch64__ version of SZ_* macros. This allows using masks with ~SZ_* without losing the 32 upper bits.
Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: Ie485fad65088df17e6c489ebb3159220d6add647
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2165f97e |
| 11-Feb-2022 |
Madhukar Pappireddy <madhukar.pappireddy@arm.com> |
Merge "feat(common): add SZ_* macros" into integration
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| #
1af59c45 |
| 08-Feb-2022 |
Yann Gautier <yann.gautier@st.com> |
feat(common): add SZ_* macros
Add the SZ_* macros from 32 to 2G. This allows removing some defines in raw NAND driver and STM32MP1 boot device selection code.
Change-Id: I3c4d4959b0f43e785eeb37a43d
feat(common): add SZ_* macros
Add the SZ_* macros from 32 to 2G. This allows removing some defines in raw NAND driver and STM32MP1 boot device selection code.
Change-Id: I3c4d4959b0f43e785eeb37a43d03b2906b7fcfbc Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Vishnu Banavath <vishnu.banavath@arm.com> Signed-off-by: Arpita S.K <Arpita.S.K@arm.com>
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c6b29198 |
| 10-Dec-2021 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "mb_critical_data" into integration
* changes: docs(measured-boot): add a platform function for critical data feat(fvp): measure critical data
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| #
cf21064e |
| 20-Oct-2021 |
Manish V Badarkhe <Manish.Badarkhe@arm.com> |
feat(fvp): measure critical data
Implemented a platform function 'plat_mboot_measure_critical_data' to measure critical data and record its measurement using the Event Log driver. 'bl2_plat_mboot_fi
feat(fvp): measure critical data
Implemented a platform function 'plat_mboot_measure_critical_data' to measure critical data and record its measurement using the Event Log driver. 'bl2_plat_mboot_finish' function invokes this platform function immediately after populating the critical data.
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com> Change-Id: Ia198295c6e07ab26d436eab1ff90df2cf28303af
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a3b16996 |
| 02-Aug-2019 |
Alexei Fedorov <Alexei.Fedorov@arm.com> |
Merge "Switch AARCH32/AARCH64 to __aarch64__" into integration
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402b3cf8 |
| 09-Jul-2019 |
Julius Werner <jwerner@chromium.org> |
Switch AARCH32/AARCH64 to __aarch64__
NOTE: AARCH32/AARCH64 macros are now deprecated in favor of __aarch64__.
All common C compilers pre-define the same macros to signal which architecture the cod
Switch AARCH32/AARCH64 to __aarch64__
NOTE: AARCH32/AARCH64 macros are now deprecated in favor of __aarch64__.
All common C compilers pre-define the same macros to signal which architecture the code is being compiled for: __arm__ for AArch32 (or earlier versions) and __aarch64__ for AArch64. There's no need for TF-A to define its own custom macros for this. In order to unify code with the export headers (which use __aarch64__ to avoid another dependency), let's deprecate the AARCH32 and AARCH64 macros and switch the code base over to the pre-defined standard macro. (Since it is somewhat unintuitive that __arm__ only means AArch32, let's standardize on only using __aarch64__.)
Change-Id: Ic77de4b052297d77f38fc95f95f65a8ee70cf200 Signed-off-by: Julius Werner <jwerner@chromium.org>
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9a207532 |
| 04-Jan-2019 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1726 from antonio-nino-diaz-arm/an/includes
Sanitise includes across codebase
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09d40e0e |
| 14-Dec-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Sanitise includes across codebase
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH} - inclu
Sanitise includes across codebase
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH} - include/lib/el3_runtime/${ARCH}
The reason for this change is that having a global namespace for includes isn't a good idea. It defeats one of the advantages of having folders and it introduces problems that are sometimes subtle (because you may not know the header you are actually including if there are two of them).
For example, this patch had to be created because two headers were called the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platform to avoid collision."). More recently, this patch has had similar problems: 46f9b2c3a282 ("drivers: add tzc380 support").
This problem was introduced in commit 4ecca33988b9 ("Move include and source files to logical locations"). At that time, there weren't too many headers so it wasn't a real issue. However, time has shown that this creates problems.
Platforms that want to preserve the way they include headers may add the removed paths to PLAT_INCLUDES, but this is discouraged.
Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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9d068f66 |
| 08-Nov-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1673 from antonio-nino-diaz-arm/an/headers
Standardise header guards across codebase
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c3cf06f1 |
| 08-Nov-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Standardise header guards across codebase
All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards.
The style that this proje
Standardise header guards across codebase
All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards.
The style that this project is now to use the full name of the file in capital letters followed by 'H'. For example, for a file called "uart_example.h", the header guard is UART_EXAMPLE_H.
The exceptions are files that are imported from other projects:
- CryptoCell driver - dt-bindings folders - zlib headers
Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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5634a493 |
| 04-Oct-2018 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
Merge pull request #1611 from antonio-nino-diaz-arm/an/misra-common
Remove some MISRA defects in common code
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81542c00 |
| 04-Oct-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Remove some MISRA defects in common code
No functional changes.
Change-Id: I9638e02acb9b22eb794ebf45aad84348a710287e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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3ccfcd6e |
| 02-Oct-2018 |
Soby Mathew <soby.mathew@arm.com> |
Merge pull request #1587 from antonio-nino-diaz-arm/an/deprecated
Remove deprecated interfaces for all platforms
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ed51b51f |
| 24-Sep-2018 |
Roberto Vargas <roberto.vargas@arm.com> |
Remove build option LOAD_IMAGE_V2
The code of LOAD_IMAGE_V2=0 has been removed.
Change-Id: Iea03e5bebb90c66889bdb23f85c07d0c9717fffe Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Sig
Remove build option LOAD_IMAGE_V2
The code of LOAD_IMAGE_V2=0 has been removed.
Change-Id: Iea03e5bebb90c66889bdb23f85c07d0c9717fffe Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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6d4f6aea |
| 22-Aug-2018 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
Merge pull request #1528 from antonio-nino-diaz-arm/an/libc
libc: Cleanup library
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93c78ed2 |
| 16-Aug-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
libc: Fix all includes in codebase
The codebase was using non-standard headers. It is needed to replace them by the correct ones so that we can use the new libc headers.
Change-Id: I530f71d9510cb03
libc: Fix all includes in codebase
The codebase was using non-standard headers. It is needed to replace them by the correct ones so that we can use the new libc headers.
Change-Id: I530f71d9510cb036e69fe79823c8230afe890b9d Acked-by: Sumit Garg <sumit.garg@linaro.org> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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c39afead |
| 09-Apr-2018 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
Merge pull request #1328 from JiafeiPan/upstream-bl2-rom
Add support for BL2 in XIP memory
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7d173fc5 |
| 21-Mar-2018 |
Jiafei Pan <Jiafei.Pan@nxp.com> |
Add support for BL2 in XIP memory
In some use-cases BL2 will be stored in eXecute In Place (XIP) memory, like BL1. In these use-cases, it is necessary to initialize the RW sections in RAM, while lea
Add support for BL2 in XIP memory
In some use-cases BL2 will be stored in eXecute In Place (XIP) memory, like BL1. In these use-cases, it is necessary to initialize the RW sections in RAM, while leaving the RO sections in place. This patch enable this use-case with a new build option, BL2_IN_XIP_MEM. For now, this option is only supported when BL2_AT_EL3 is 1.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
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| #
e74af2af |
| 29-Mar-2018 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
Merge pull request #1335 from JoelHutton/jh/cleanup_void_pointers
Clean usage of void pointers to access symbols
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9f85f9e3 |
| 21-Mar-2018 |
Joel Hutton <Joel.Hutton@Arm.com> |
Clean usage of void pointers to access symbols
Void pointers have been used to access linker symbols, by declaring an extern pointer, then taking the address of it. This limits symbols values to ali
Clean usage of void pointers to access symbols
Void pointers have been used to access linker symbols, by declaring an extern pointer, then taking the address of it. This limits symbols values to aligned pointer values. To remove this restriction an IMPORT_SYM macro has been introduced, which declares it as a char pointer and casts it to the required type.
Change-Id: I89877fc3b13ed311817bb8ba79d4872b89bfd3b0 Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com>
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