Searched refs:CMD_5 (Results 1 – 13 of 13) sorted by relevance
| /rk3399_ARM-atf/plat/mediatek/mt8186/drivers/spm/ |
| H A D | mt_spm_pmic_wrap.h | 25 CMD_5 = 5U, /* 0x5 */ enumerator
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| H A D | mt_spm_pmic_wrap.c | 58 ._[CMD_5] = { TOP_SPI_CON0_66, 0x1, },
78 ._[CMD_5] = { TOP_SPI_CON0_57, 0x1, },
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| /rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8189/ |
| H A D | mt_plat_spm_setting.h | 29 CMD_5, /* 0x5 */ enumerator
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| /rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8188/ |
| H A D | mt_spm_pmic_wrap.h | 26 CMD_5, enumerator
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| H A D | mt_spm_pmic_wrap.c | 66 ._[CMD_5] = {TOP_SPI_CON0, _BITS_(0, 0, 0),},
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| /rk3399_ARM-atf/plat/mediatek/mt8192/drivers/spm/ |
| H A D | mt_spm_pmic_wrap.h | 25 CMD_5, /* 0x5 */ enumerator
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| H A D | mt_spm_pmic_wrap.c | 61 ._[CMD_5] = {TOP_SPI_CON0, 0x0,},
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| /rk3399_ARM-atf/plat/mediatek/mt8195/drivers/spm/ |
| H A D | mt_spm_pmic_wrap.h | 25 CMD_5, /* 0x5 */ enumerator
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| H A D | mt_spm_pmic_wrap.c | 61 ._[CMD_5] = {TOP_SPI_CON0, 0x0,},
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| /rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8196/ |
| H A D | mt_plat_spm_setting.h | 27 CMD_5, enumerator
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| H A D | mt_vcore_dvfsrc_plat.c | 227 spm_vcorefs_pwarp_cmd(CMD_5, VCORE_UV_TO_PMIC(v_opp_uv[2])); in spm_vcorefs_vcore_setting()
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| /rk3399_ARM-atf/plat/mediatek/mt8183/drivers/spm/ |
| H A D | spm_pmic_wrap.h | 26 CMD_5, /* 0x5 */ enumerator
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| H A D | spm_pmic_wrap.c | 64 ._[CMD_5] = {BUCK_VPROC11_CON0, 0x1,},
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