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Searched refs:reg1 (Results 1 – 25 of 228) sorted by relevance

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/OK3568_Linux_fs/kernel/arch/nios2/include/asm/
H A Dasm-macros.h19 .macro ANDI32 reg1, reg2, mask
22 movhi \reg1, %hi(\mask)
23 movui \reg1, %lo(\mask)
24 and \reg1, \reg1, \reg2
26 andi \reg1, \reg2, %lo(\mask)
29 andhi \reg1, \reg2, %hi(\mask)
39 .macro ORI32 reg1, reg2, mask
42 orhi \reg1, \reg2, %hi(\mask)
43 ori \reg1, \reg2, %lo(\mask)
45 ori \reg1, \reg2, %lo(\mask)
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/include/asm/
H A Dkvm_ptrauth.h26 .macro ptrauth_save_state base, reg1, reg2
27 mrs_s \reg1, SYS_APIAKEYLO_EL1
29 stp \reg1, \reg2, [\base, #PTRAUTH_REG_OFFSET(CPU_APIAKEYLO_EL1)]
30 mrs_s \reg1, SYS_APIBKEYLO_EL1
32 stp \reg1, \reg2, [\base, #PTRAUTH_REG_OFFSET(CPU_APIBKEYLO_EL1)]
33 mrs_s \reg1, SYS_APDAKEYLO_EL1
35 stp \reg1, \reg2, [\base, #PTRAUTH_REG_OFFSET(CPU_APDAKEYLO_EL1)]
36 mrs_s \reg1, SYS_APDBKEYLO_EL1
38 stp \reg1, \reg2, [\base, #PTRAUTH_REG_OFFSET(CPU_APDBKEYLO_EL1)]
39 mrs_s \reg1, SYS_APGAKEYLO_EL1
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/OK3568_Linux_fs/kernel/arch/s390/include/asm/
H A Dap.h57 register unsigned long reg1 asm ("1") = 0; in ap_instructions_available()
65 : "+d" (reg1), "+d" (reg2) in ap_instructions_available()
68 return reg1 != 0; in ap_instructions_available()
81 register struct ap_queue_status reg1 asm ("1"); in ap_tapq()
85 : "=d" (reg1), "=d" (reg2) in ap_tapq()
90 return reg1; in ap_tapq()
119 register struct ap_queue_status reg1 asm ("1"); in ap_rapq()
123 : "=d" (reg1) in ap_rapq()
126 return reg1; in ap_rapq()
138 register struct ap_queue_status reg1 asm ("1"); in ap_zapq()
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/OK3568_Linux_fs/kernel/arch/arm/probes/kprobes/
H A Dtest-core.h239 #define TEST_RR(code1, reg1, val1, code2, reg2, val2, code3) \ argument
240 TESTCASE_START(code1 #reg1 code2 #reg2 code3) \
241 TEST_ARG_REG(reg1, val1) \
244 TEST_INSTRUCTION(code1 #reg1 code2 #reg2 code3) \
247 #define TEST_RRR(code1, reg1, val1, code2, reg2, val2, code3, reg3, val3, code4)\ argument
248 TESTCASE_START(code1 #reg1 code2 #reg2 code3 #reg3 code4) \
249 TEST_ARG_REG(reg1, val1) \
253 TEST_INSTRUCTION(code1 #reg1 code2 #reg2 code3 #reg3 code4) \
256 #define TEST_RRRR(code1, reg1, val1, code2, reg2, val2, code3, reg3, val3, code4, reg4, val4) \ argument
257 TESTCASE_START(code1 #reg1 code2 #reg2 code3 #reg3 code4 #reg4) \
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/OK3568_Linux_fs/kernel/arch/x86/events/intel/
H A Duncore_nhmex.c353 struct hw_perf_event_extra *reg1 = &hwc->extra_reg; in nhmex_bbox_hw_config() local
368 reg1->reg = NHMEX_B0_MSR_MATCH; in nhmex_bbox_hw_config()
370 reg1->reg = NHMEX_B1_MSR_MATCH; in nhmex_bbox_hw_config()
371 reg1->idx = 0; in nhmex_bbox_hw_config()
372 reg1->config = event->attr.config1; in nhmex_bbox_hw_config()
380 struct hw_perf_event_extra *reg1 = &hwc->extra_reg; in nhmex_bbox_msr_enable_event() local
383 if (reg1->idx != EXTRA_REG_NONE) { in nhmex_bbox_msr_enable_event()
384 wrmsrl(reg1->reg, reg1->config); in nhmex_bbox_msr_enable_event()
385 wrmsrl(reg1->reg + 1, reg2->config); in nhmex_bbox_msr_enable_event()
444 struct hw_perf_event_extra *reg1 = &hwc->extra_reg; in nhmex_sbox_hw_config() local
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/OK3568_Linux_fs/kernel/arch/arm/lib/
H A Dcopy_from_user.S46 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
47 ldr1w \ptr, \reg1, \abort
53 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
54 ldr4w \ptr, \reg1, \reg2, \reg3, \reg4, \abort
66 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
67 USERL(\abort, ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4})
70 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
71 USERL(\abort, ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8})
86 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
87 stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
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H A Dmemcpy.S21 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
22 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4}
25 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
26 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
37 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
38 stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
45 .macro enter reg1 reg2
46 stmdb sp!, {r0, \reg1, \reg2}
49 .macro usave reg1 reg2
50 UNWIND( .save {r0, \reg1, \reg2} )
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H A Dcsumpartialcopy.S25 .macro load1b, reg1 argument
26 ldrb \reg1, [r0], #1
29 .macro load2b, reg1, reg2
30 ldrb \reg1, [r0], #1
34 .macro load1l, reg1 argument
35 ldr \reg1, [r0], #4
38 .macro load2l, reg1, reg2
39 ldr \reg1, [r0], #4
43 .macro load4l, reg1, reg2, reg3, reg4
44 ldmia r0!, {\reg1, \reg2, \reg3, \reg4}
H A Dcopy_to_user.S40 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
41 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4}
44 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
45 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
64 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
65 str1w \ptr, \reg1, \abort
83 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
84 USERL(\abort, stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8})
93 .macro enter reg1 reg2
95 stmdb sp!, {r0, r2, r3, \reg1, \reg2}
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H A Dcsumpartialcopyuser.S38 .macro load1b, reg1 argument
39 ldrusr \reg1, r0, 1
42 .macro load2b, reg1, reg2
43 ldrusr \reg1, r0, 1
47 .macro load1l, reg1 argument
48 ldrusr \reg1, r0, 4
51 .macro load2l, reg1, reg2
52 ldrusr \reg1, r0, 4
56 .macro load4l, reg1, reg2, reg3, reg4
57 ldrusr \reg1, r0, 4
/OK3568_Linux_fs/kernel/drivers/s390/cio/
H A Dioasm.c18 register struct subchannel_id reg1 asm ("1") = schid; in __stsch()
28 : "d" (reg1), "a" (addr) in __stsch()
46 register struct subchannel_id reg1 asm ("1") = schid; in __msch()
56 : "d" (reg1), "a" (addr), "m" (*addr) in __msch()
73 register struct subchannel_id reg1 asm ("1") = schid; in __tsch()
81 : "d" (reg1), "a" (addr) in __tsch()
98 register struct subchannel_id reg1 asm("1") = schid; in __ssch()
108 : "d" (reg1), "a" (addr), "m" (*addr) in __ssch()
126 register struct subchannel_id reg1 asm("1") = schid; in __csch()
134 : "d" (reg1) in __csch()
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/OK3568_Linux_fs/kernel/arch/arm/kernel/
H A Dhyp-stub.S29 .macro store_primary_cpu_mode reg1, reg2, reg3
30 mrs \reg1, cpsr
31 and \reg1, \reg1, #MODE_MASK
34 str \reg1, [\reg2, \reg3]
43 .macro compare_cpu_mode_with_primary mode, reg1, reg2, reg3
46 ldr \reg1, [\reg2, \reg3]
47 cmp \mode, \reg1 @ matches primary CPU boot mode?
48 orrne \reg1, \reg1, #BOOT_CPU_MODE_MISMATCH
49 strne \reg1, [\reg2, \reg3] @ record what happened and give up
54 .macro store_primary_cpu_mode reg1:req, reg2:req, reg3:req
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/OK3568_Linux_fs/kernel/sound/pci/ice1712/
H A Dwm8776.c137 .reg1 = WM8776_REG_DACLVOL,
147 .reg1 = WM8776_REG_DACCTRL1,
156 .reg1 = WM8776_REG_DACCTRL1,
163 .reg1 = WM8776_REG_HPLVOL,
174 .reg1 = WM8776_REG_PWRDOWN,
181 .reg1 = WM8776_REG_HPLVOL,
190 .reg1 = WM8776_REG_OUTMUX,
196 .reg1 = WM8776_REG_OUTMUX,
202 .reg1 = WM8776_REG_DACCTRL1,
208 .reg1 = WM8776_REG_PHASESWAP,
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H A Dwm8766.c34 .reg1 = WM8766_REG_DACL1,
45 .reg1 = WM8766_REG_DACL2,
56 .reg1 = WM8766_REG_DACL3,
66 .reg1 = WM8766_REG_DACCTRL2,
73 .reg1 = WM8766_REG_DACCTRL2,
80 .reg1 = WM8766_REG_DACCTRL2,
87 .reg1 = WM8766_REG_IFCTRL,
93 .reg1 = WM8766_REG_IFCTRL,
99 .reg1 = WM8766_REG_IFCTRL,
105 .reg1 = WM8766_REG_DACCTRL2,
[all …]
/OK3568_Linux_fs/u-boot/post/lib_powerpc/
H A Drlwimi.c64 unsigned int reg1 = (reg + 1) % 32; in cpu_post_test_rlwimi() local
73 ASM_STW(reg1, stk, 0), in cpu_post_test_rlwimi()
74 ASM_LWZ(reg1, stk, 8), in cpu_post_test_rlwimi()
76 ASM_113(test->cmd, reg1, reg0, test->op2, test->mb, test->me), in cpu_post_test_rlwimi()
77 ASM_STW(reg1, stk, 8), in cpu_post_test_rlwimi()
78 ASM_LWZ(reg1, stk, 0), in cpu_post_test_rlwimi()
92 ASM_STW(reg1, stk, 0), in cpu_post_test_rlwimi()
93 ASM_LWZ(reg1, stk, 8), in cpu_post_test_rlwimi()
95 ASM_113(test->cmd, reg1, reg0, test->op2, test->mb, test->me) | in cpu_post_test_rlwimi()
97 ASM_STW(reg1, stk, 8), in cpu_post_test_rlwimi()
[all …]
H A Dtwox.c83 unsigned int reg1 = (reg + 1) % 32; in cpu_post_test_twox() local
91 ASM_STW(reg1, stk, 0), in cpu_post_test_twox()
93 ASM_11X(test->cmd, reg1, reg0), in cpu_post_test_twox()
94 ASM_STW(reg1, stk, 8), in cpu_post_test_twox()
95 ASM_LWZ(reg1, stk, 0), in cpu_post_test_twox()
108 ASM_STW(reg1, stk, 0), in cpu_post_test_twox()
110 ASM_11X(test->cmd, reg1, reg0) | BIT_C, in cpu_post_test_twox()
111 ASM_STW(reg1, stk, 8), in cpu_post_test_twox()
112 ASM_LWZ(reg1, stk, 0), in cpu_post_test_twox()
H A Dtwo.c83 unsigned int reg1 = (reg + 1) % 32; in cpu_post_test_two() local
91 ASM_STW(reg1, stk, 0), in cpu_post_test_two()
93 ASM_11(test->cmd, reg1, reg0), in cpu_post_test_two()
94 ASM_STW(reg1, stk, 8), in cpu_post_test_two()
95 ASM_LWZ(reg1, stk, 0), in cpu_post_test_two()
108 ASM_STW(reg1, stk, 0), in cpu_post_test_two()
110 ASM_11(test->cmd, reg1, reg0) | BIT_C, in cpu_post_test_two()
111 ASM_STW(reg1, stk, 8), in cpu_post_test_two()
112 ASM_LWZ(reg1, stk, 0), in cpu_post_test_two()
H A Dsrawi.c63 unsigned int reg1 = (reg + 1) % 32; in cpu_post_test_srawi() local
71 ASM_STW(reg1, stk, 0), in cpu_post_test_srawi()
73 ASM_11S(test->cmd, reg1, reg0, test->op2), in cpu_post_test_srawi()
74 ASM_STW(reg1, stk, 8), in cpu_post_test_srawi()
75 ASM_LWZ(reg1, stk, 0), in cpu_post_test_srawi()
88 ASM_STW(reg1, stk, 0), in cpu_post_test_srawi()
90 ASM_11S(test->cmd, reg1, reg0, test->op2) | BIT_C, in cpu_post_test_srawi()
91 ASM_STW(reg1, stk, 8), in cpu_post_test_srawi()
92 ASM_LWZ(reg1, stk, 0), in cpu_post_test_srawi()
H A Drlwinm.c61 unsigned int reg1 = (reg + 1) % 32; in cpu_post_test_rlwinm() local
69 ASM_STW(reg1, stk, 0), in cpu_post_test_rlwinm()
71 ASM_113(test->cmd, reg1, reg0, test->op2, test->mb, test->me), in cpu_post_test_rlwinm()
72 ASM_STW(reg1, stk, 8), in cpu_post_test_rlwinm()
73 ASM_LWZ(reg1, stk, 0), in cpu_post_test_rlwinm()
86 ASM_STW(reg1, stk, 0), in cpu_post_test_rlwinm()
88 ASM_113(test->cmd, reg1, reg0, test->op2, test->mb, in cpu_post_test_rlwinm()
90 ASM_STW(reg1, stk, 8), in cpu_post_test_rlwinm()
91 ASM_LWZ(reg1, stk, 0), in cpu_post_test_rlwinm()
H A Dthreex.c127 unsigned int reg1 = (reg + 1) % 32; in cpu_post_test_threex() local
137 ASM_STW(reg1, stk, 4), in cpu_post_test_threex()
139 ASM_LWZ(reg1, stk, 12), in cpu_post_test_threex()
141 ASM_12X(test->cmd, reg2, reg1, reg0), in cpu_post_test_threex()
144 ASM_LWZ(reg1, stk, 4), in cpu_post_test_threex()
158 ASM_STW(reg1, stk, 4), in cpu_post_test_threex()
160 ASM_LWZ(reg1, stk, 12), in cpu_post_test_threex()
162 ASM_12X(test->cmd, reg2, reg1, reg0) | BIT_C, in cpu_post_test_threex()
165 ASM_LWZ(reg1, stk, 4), in cpu_post_test_threex()
H A Drlwnm.c62 unsigned int reg1 = (reg + 1) % 32; in cpu_post_test_rlwnm() local
72 ASM_STW(reg1, stk, 4), in cpu_post_test_rlwnm()
74 ASM_LWZ(reg1, stk, 12), in cpu_post_test_rlwnm()
76 ASM_122(test->cmd, reg2, reg1, reg0, test->mb, test->me), in cpu_post_test_rlwnm()
79 ASM_LWZ(reg1, stk, 4), in cpu_post_test_rlwnm()
93 ASM_STW(reg1, stk, 4), in cpu_post_test_rlwnm()
95 ASM_LWZ(reg1, stk, 12), in cpu_post_test_rlwnm()
97 ASM_122(test->cmd, reg2, reg1, reg0, test->mb, test->me) | in cpu_post_test_rlwnm()
101 ASM_LWZ(reg1, stk, 4), in cpu_post_test_rlwnm()
H A Dthree.c157 unsigned int reg1 = (reg + 1) % 32; in cpu_post_test_three() local
167 ASM_STW(reg1, stk, 4), in cpu_post_test_three()
169 ASM_LWZ(reg1, stk, 12), in cpu_post_test_three()
171 ASM_12(test->cmd, reg2, reg1, reg0), in cpu_post_test_three()
174 ASM_LWZ(reg1, stk, 4), in cpu_post_test_three()
188 ASM_STW(reg1, stk, 4), in cpu_post_test_three()
190 ASM_LWZ(reg1, stk, 12), in cpu_post_test_three()
192 ASM_12(test->cmd, reg2, reg1, reg0) | BIT_C, in cpu_post_test_three()
195 ASM_LWZ(reg1, stk, 4), in cpu_post_test_three()
/OK3568_Linux_fs/kernel/arch/arm64/crypto/
H A Daes-cipher-core.S20 .macro __pair1, sz, op, reg0, reg1, in0, in1e, in1d, shift
23 ubfiz \reg1, \in1e, #2, #8
26 ubfx \reg1, \in1e, #\shift, #8
38 ldr \reg1, [tt, \reg1, uxtw #2]
42 lsl \reg1, \reg1, #2
45 ldrb \reg1, [tt, \reg1, uxtw]
49 .macro __pair0, sz, op, reg0, reg1, in0, in1e, in1d, shift
51 ubfx \reg1, \in1d, #\shift, #8
53 ldr\op \reg1, [tt, \reg1, uxtw #\sz]
/OK3568_Linux_fs/kernel/drivers/rtc/
H A Drtc-aspeed.c26 u32 reg1, reg2; in aspeed_rtc_read_time() local
35 reg1 = readl(rtc->base + RTC_TIME); in aspeed_rtc_read_time()
38 tm->tm_mday = (reg1 >> 24) & 0x1f; in aspeed_rtc_read_time()
39 tm->tm_hour = (reg1 >> 16) & 0x1f; in aspeed_rtc_read_time()
40 tm->tm_min = (reg1 >> 8) & 0x3f; in aspeed_rtc_read_time()
41 tm->tm_sec = (reg1 >> 0) & 0x3f; in aspeed_rtc_read_time()
56 u32 reg1, reg2, ctrl; in aspeed_rtc_set_time() local
62 reg1 = (tm->tm_mday << 24) | (tm->tm_hour << 16) | (tm->tm_min << 8) | in aspeed_rtc_set_time()
71 writel(reg1, rtc->base + RTC_TIME); in aspeed_rtc_set_time()
/OK3568_Linux_fs/kernel/drivers/media/dvb-frontends/
H A Dtua6100.c64 u8 reg1[] = { 0x01, 0x00, 0x00, 0x00 }; in tua6100_set_params() local
67 struct i2c_msg msg1 = { .addr = priv->i2c_address, .flags = 0, .buf = reg1, .len = 4 }; in tua6100_set_params()
82 reg1[1] = 0x2c; in tua6100_set_params()
84 reg1[1] = 0x0c; in tua6100_set_params()
87 reg1[1] |= 0x40; in tua6100_set_params()
89 reg1[1] |= 0x80; in tua6100_set_params()
107 reg1[1] |= (div >> 9) & 0x03; in tua6100_set_params()
108 reg1[2] = div >> 1; in tua6100_set_params()
109 reg1[3] = (div << 7); in tua6100_set_params()
113 reg1[3] |= (prediv - (div*_P_VAL)) & 0x7f; in tua6100_set_params()

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