Searched refs:cap1 (Results 1 – 11 of 11) sorted by relevance
106 u32 ctrl, header, cap1, ctrl2; in pci_vc_enable() local130 pci_read_config_dword(dev->bus->self, pos2 + PCI_VC_PORT_CAP1, &cap1); in pci_vc_enable()131 evcc = cap1 & PCI_VC_CAP1_EVCC; in pci_vc_enable()188 u32 cap1; in pci_vc_do_save_buffer() local200 pci_read_config_dword(dev, pos + PCI_VC_PORT_CAP1, &cap1); in pci_vc_do_save_buffer()202 evcc = cap1 & PCI_VC_CAP1_EVCC; in pci_vc_do_save_buffer()204 lpevcc = (cap1 & PCI_VC_CAP1_LPEVCC) >> 4; in pci_vc_do_save_buffer()206 parb_size = 1 << ((cap1 & PCI_VC_CAP1_ARB_SIZE) >> 10); in pci_vc_do_save_buffer()
70 void __iomem *cap1; member
933 par->cap1 = par->mmio_base + MB86297_CAP1_BASE; in carmine_init()
348 writel(ticks - 1, &ecap->cap1); in enable_pwm()
545 unsigned int cap1; member
3866 #define CC_GCI_NUMCHIPCTRLREGS(cap1) ((cap1 & 0xF00) >> 8) argument
3782 #define CC_GCI_NUMCHIPCTRLREGS(cap1) ((cap1 & 0xF00) >> 8) argument
4525 #define CC_GCI_NUMCHIPCTRLREGS(cap1) ((cap1 & 0xF00u) >> 8u) argument