Home
last modified time | relevance | path

Searched refs:SCLK_I2S0_8CH_TX_OUT (Results 1 – 8 of 8) sorted by relevance

/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3308b-mipi-display-v11.dtsi93 clocks = <&cru SCLK_I2S0_8CH_TX_OUT>;
95 assigned-clocks = <&cru SCLK_I2S0_8CH_TX_OUT>;
103 clocks = <&cru SCLK_I2S0_8CH_TX_OUT>, <&cru DCLK_VOP>;
111 assigned-clock-parents = <&cru SCLK_I2S0_8CH_TX_OUT>,
115 <&cru SCLK_I2S0_8CH_TX_OUT>,
H A Drk3308-ai-va-v10.dts587 clocks = <&cru SCLK_I2S0_8CH_TX_OUT>;
/OK3568_Linux_fs/u-boot/include/dt-bindings/clock/
H A Drk3308-cru.h90 #define SCLK_I2S0_8CH_TX_OUT 77 macro
H A Drk1808-cru.h97 #define SCLK_I2S0_8CH_TX_OUT 96 macro
/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Drk3308-cru.h81 #define SCLK_I2S0_8CH_TX_OUT 77 macro
H A Drk1808-cru.h97 #define SCLK_I2S0_8CH_TX_OUT 96 macro
/OK3568_Linux_fs/kernel/drivers/clk/rockchip/
H A Dclk-rk3308.c655 …COMPOSITE_NODIV(SCLK_I2S0_8CH_TX_OUT, "clk_i2s0_8ch_tx_out", mux_i2s0_8ch_tx_out_p, CLK_SET_RATE_P…
H A Dclk-rk1808.c1021 …COMPOSITE_NODIV(SCLK_I2S0_8CH_TX_OUT, "clk_i2s0_8ch_tx_out", mux_i2s0_8ch_tx_out_p, CLK_SET_RATE_P…