Searched refs:PLL4 (Results 1 – 12 of 12) sorted by relevance
| /OK3568_Linux_fs/kernel/include/dt-bindings/clock/ |
| H A D | qcom,lcc-ipq806x.h | 9 #define PLL4 0 macro
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| H A D | qcom,lcc-mdm9615.h | 11 #define PLL4 0 macro
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| H A D | qcom,lcc-msm8960.h | 9 #define PLL4 0 macro
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| H A D | stm32mp1-clks.h | 186 #define PLL4 179 macro
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | stm32mp157c-odyssey.dts | 35 assigned-clock-rates = <125000000>; /* Clock PLL4 to 750Mhz in ATF/U-Boot */
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| /OK3568_Linux_fs/kernel/drivers/clk/qcom/ |
| H A D | lcc-ipq806x.c | 394 [PLL4] = &pll4.clkr,
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| H A D | lcc-msm8960.c | 479 [PLL4] = &pll4.clkr,
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| H A D | lcc-mdm9615.c | 481 [PLL4] = &pll4.clkr,
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| /OK3568_Linux_fs/kernel/drivers/net/wireless/ath/ath9k/ |
| H A D | reg.h | 1377 #define PLL4 0x1618c macro
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| H A D | hw.c | 745 while ((REG_READ(ah, PLL4) & PLL4_MEAS_DONE) == 0) { in ar9003_get_pll_sqsum_dvc()
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| /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/ti/ |
| H A D | k3-am65-main.dtsi | 862 * Set vp2 clk (DPI_1_IN_CLK) mux to PLL4 via
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| /OK3568_Linux_fs/kernel/drivers/clk/ |
| H A D | clk-stm32mp1.c | 1689 PLL(PLL4, "pll4", "ref4", CLK_IGNORE_UNUSED, RCC_PLL4CR),
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