1*4882a593Smuzhiyun// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (C) 2020 Marcin Sloniewski <marcin.sloniewski@gmail.com>. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun/dts-v1/; 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun#include "stm32mp157c-odyssey-som.dtsi" 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun/ { 11*4882a593Smuzhiyun model = "Seeed Studio Odyssey-STM32MP157C Board"; 12*4882a593Smuzhiyun compatible = "seeed,stm32mp157c-odyssey", 13*4882a593Smuzhiyun "seeed,stm32mp157c-odyssey-som", "st,stm32mp157"; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun aliases { 16*4882a593Smuzhiyun ethernet0 = ðernet0; 17*4882a593Smuzhiyun serial0 = &uart4; 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun chosen { 21*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun}; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyunðernet0 { 26*4882a593Smuzhiyun status = "okay"; 27*4882a593Smuzhiyun pinctrl-0 = <ðernet0_rgmii_pins_a>; 28*4882a593Smuzhiyun pinctrl-1 = <ðernet0_rgmii_sleep_pins_a>; 29*4882a593Smuzhiyun pinctrl-names = "default", "sleep"; 30*4882a593Smuzhiyun phy-mode = "rgmii-id"; 31*4882a593Smuzhiyun max-speed = <1000>; 32*4882a593Smuzhiyun phy-handle = <&phy0>; 33*4882a593Smuzhiyun assigned-clocks = <&rcc ETHCK_K>, <&rcc PLL4_P>; 34*4882a593Smuzhiyun assigned-clock-parents = <&rcc PLL4_P>; 35*4882a593Smuzhiyun assigned-clock-rates = <125000000>; /* Clock PLL4 to 750Mhz in ATF/U-Boot */ 36*4882a593Smuzhiyun st,eth-clk-sel; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun mdio0 { 39*4882a593Smuzhiyun #address-cells = <1>; 40*4882a593Smuzhiyun #size-cells = <0>; 41*4882a593Smuzhiyun compatible = "snps,dwmac-mdio"; 42*4882a593Smuzhiyun phy0: ethernet-phy@7 { /* KSZ9031RN */ 43*4882a593Smuzhiyun reg = <7>; 44*4882a593Smuzhiyun reset-gpios = <&gpiog 0 GPIO_ACTIVE_LOW>; /* ETH_RST# */ 45*4882a593Smuzhiyun reset-assert-us = <10000>; 46*4882a593Smuzhiyun reset-deassert-us = <300>; 47*4882a593Smuzhiyun }; 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun}; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun&i2c1 { 52*4882a593Smuzhiyun pinctrl-names = "default", "sleep"; 53*4882a593Smuzhiyun pinctrl-0 = <&i2c1_pins_a>; 54*4882a593Smuzhiyun pinctrl-1 = <&i2c1_sleep_pins_a>; 55*4882a593Smuzhiyun i2c-scl-rising-time-ns = <100>; 56*4882a593Smuzhiyun i2c-scl-falling-time-ns = <7>; 57*4882a593Smuzhiyun status = "okay"; 58*4882a593Smuzhiyun /delete-property/dmas; 59*4882a593Smuzhiyun /delete-property/dma-names; 60*4882a593Smuzhiyun}; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun&sdmmc1 { 63*4882a593Smuzhiyun pinctrl-names = "default", "opendrain", "sleep"; 64*4882a593Smuzhiyun pinctrl-0 = <&sdmmc1_b4_pins_a>; 65*4882a593Smuzhiyun pinctrl-1 = <&sdmmc1_b4_od_pins_a>; 66*4882a593Smuzhiyun pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>; 67*4882a593Smuzhiyun cd-gpios = <&gpioi 3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; 68*4882a593Smuzhiyun disable-wp; 69*4882a593Smuzhiyun st,neg-edge; 70*4882a593Smuzhiyun bus-width = <4>; 71*4882a593Smuzhiyun vmmc-supply = <&v3v3>; 72*4882a593Smuzhiyun status = "okay"; 73*4882a593Smuzhiyun}; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun&uart4 { 76*4882a593Smuzhiyun pinctrl-names = "default"; 77*4882a593Smuzhiyun pinctrl-0 = <&uart4_pins_a>; 78*4882a593Smuzhiyun status = "okay"; 79*4882a593Smuzhiyun}; 80*4882a593Smuzhiyun 81