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Searched refs:NV_PA_CLK_RST_BASE (Results 1 – 15 of 15) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/tegra20/
H A Dclock.c396 (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in clock_get_osc_freq()
407 (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in get_periph_source_reg()
511 (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in clock_set_enable()
528 (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in reset_set_enable()
662 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_train()
684 value = readl(NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
687 writel(value, NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
690 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()
694 writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()
696 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()
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H A Dwarmboot_avp.c30 (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in wb_start()
/OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/tegra30/
H A Dclock.c446 (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in clock_get_osc_freq()
462 (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in get_periph_source_reg()
558 (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in clock_set_enable()
579 (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in reset_set_enable()
691 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_train()
713 value = readl(NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
716 writel(value, NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
719 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()
723 writel(value, NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()
725 value = readl(NV_PA_CLK_RST_BASE + PLLE_MISC); in tegra_plle_enable()
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H A Dcpu.c88 (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in t30_init_clocks()
/OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/tegra210/
H A Dclock.c677 (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in clock_get_osc_freq()
703 (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in get_periph_source_reg()
814 (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in clock_set_enable()
840 (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in reset_set_enable()
937 struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in tegra210_setup_pllp()
973 (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in clock_early_init()
1036 struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in clk_m_get_rate()
1090 value = readl(NV_PA_CLK_RST_BASE + PLLREFE_MISC); in tegra_pllref_enable()
1092 writel(value, NV_PA_CLK_RST_BASE + PLLREFE_MISC); in tegra_pllref_enable()
1101 writel(value, NV_PA_CLK_RST_BASE + PLLREFE_BASE); in tegra_pllref_enable()
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H A Dxusb-padctl.c370 value = readl(NV_PA_CLK_RST_BASE + CLK_RST_XUSBIO_PLL_CFG0); in pcie_phy_enable()
375 writel(value, NV_PA_CLK_RST_BASE + CLK_RST_XUSBIO_PLL_CFG0); in pcie_phy_enable()
391 value = readl(NV_PA_CLK_RST_BASE + CLK_RST_XUSBIO_PLL_CFG0); in pcie_phy_enable()
393 writel(value, NV_PA_CLK_RST_BASE + CLK_RST_XUSBIO_PLL_CFG0); in pcie_phy_enable()
/OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/tegra124/
H A Dclock.c608 (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in clock_get_osc_freq()
624 (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in get_periph_source_reg()
724 (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in clock_set_enable()
747 (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in reset_set_enable()
838 (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in clock_early_init()
904 struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in clock_early_init_done()
967 value = readl(NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
969 writel(value, NV_PA_CLK_RST_BASE + PLLE_BASE); in tegra_plle_enable()
971 value = readl(NV_PA_CLK_RST_BASE + PLLE_AUX); in tegra_plle_enable()
974 writel(value, NV_PA_CLK_RST_BASE + PLLE_AUX); in tegra_plle_enable()
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H A Dcpu.c47 struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in enable_cpu_clocks()
84 struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in remove_cpu_resets()
117 (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in tegra124_init_clocks()
/OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/tegra114/
H A Dcpu.c22 struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in enable_cpu_power_rail()
54 struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in enable_cpu_clocks()
79 struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in remove_cpu_resets()
112 (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in t114_init_clocks()
H A Dclock.c466 (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in clock_get_osc_freq()
482 (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in get_periph_source_reg()
578 (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in clock_set_enable()
599 (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in reset_set_enable()
658 (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in clock_early_init()
/OK3568_Linux_fs/u-boot/arch/arm/mach-tegra/
H A Dcpu.c157 struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in pllx_set_iddq()
231 struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in init_pllx()
261 struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in enable_cpu_clock()
H A Dclock.c64 (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in clock_get_osc_bypass()
75 (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in get_pll()
514 (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in reset_cmplx_set_enable()
726 (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in set_avp_clock_source()
745 struct clk_rst_ctlr *clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in tegra30_set_up_pllp()
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-tegra/
H A Dtegra.h14 #define NV_PA_CLK_RST_BASE 0x60006000 macro
/OK3568_Linux_fs/u-boot/drivers/pci/
H A Dpci_tegra.c642 value = readl(NV_PA_CLK_RST_BASE + 0x48c); in tegra_pcie_power_on()
645 writel(value, NV_PA_CLK_RST_BASE + 0x48c); in tegra_pcie_power_on()
/OK3568_Linux_fs/u-boot/drivers/usb/host/
H A Dehci-tegra.c412 clkrst = (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; in init_utmi_usb_controller()