Searched refs:MAX_BUS_NUM (Results 1 – 13 of 13) sorted by relevance
17 u32 nominal_adll[MAX_INTERFACE_NUM * MAX_BUS_NUM];19 u8 result_mat[MAX_INTERFACE_NUM][MAX_BUS_NUM][BUS_WIDTH_IN_BITS];20 u8 result_mat_rx_dqs[MAX_INTERFACE_NUM][MAX_BUS_NUM][MAX_CS_NUM];22 u8 result_all_bit[MAX_BUS_NUM * BUS_WIDTH_IN_BITS * MAX_INTERFACE_NUM];23 u8 max_pbs_per_pup[MAX_INTERFACE_NUM][MAX_BUS_NUM];24 u8 min_pbs_per_pup[MAX_INTERFACE_NUM][MAX_BUS_NUM];25 u8 max_adll_per_pup[MAX_INTERFACE_NUM][MAX_BUS_NUM];26 u8 min_adll_per_pup[MAX_INTERFACE_NUM][MAX_BUS_NUM];27 u32 pbsdelay_per_pup[NUM_OF_PBS_MODES][MAX_INTERFACE_NUM][MAX_BUS_NUM];28 u8 adll_shift_lock[MAX_INTERFACE_NUM][MAX_BUS_NUM];[all …]
540 for (bus_id = 0; bus_id < MAX_BUS_NUM; bus_id++) { in ddr3_tip_print_stability_log()656 int read_adll_value(u32 pup_values[MAX_INTERFACE_NUM * MAX_BUS_NUM], in read_adll_value() argument690 int write_adll_value(u32 pup_values[MAX_INTERFACE_NUM * MAX_BUS_NUM], in write_adll_value() argument733 u32 ctrl_sweepres[ADLL_LENGTH][MAX_INTERFACE_NUM][MAX_BUS_NUM];734 u32 ctrl_adll[MAX_CS_NUM * MAX_INTERFACE_NUM * MAX_BUS_NUM];1126 if_id = (flag_id - 0x270) / MAX_BUS_NUM; in ddr3_tip_access_atr()1127 pup_id = (flag_id - 0x270) % MAX_BUS_NUM; in ddr3_tip_access_atr()1131 if_id = (flag_id - 0x2d0) / MAX_BUS_NUM; in ddr3_tip_access_atr()1132 pup_id = (flag_id - 0x2d0) % MAX_BUS_NUM; in ddr3_tip_access_atr()1136 if_id = (flag_id - 0x330) / MAX_BUS_NUM; in ddr3_tip_access_atr()[all …]
25 u8 current_vref[MAX_BUS_NUM][MAX_INTERFACE_NUM];26 u8 last_vref[MAX_BUS_NUM][MAX_INTERFACE_NUM];27 u16 current_valid_window[MAX_BUS_NUM][MAX_INTERFACE_NUM];28 u16 last_valid_window[MAX_BUS_NUM][MAX_INTERFACE_NUM];29 u8 lim_vref[MAX_BUS_NUM][MAX_INTERFACE_NUM];31 u8 vref_window_size[MAX_INTERFACE_NUM][MAX_BUS_NUM];34 static u8 pup_st[MAX_BUS_NUM][MAX_INTERFACE_NUM];
340 int read_pup_value(int pup_values[MAX_INTERFACE_NUM * MAX_BUS_NUM],342 int read_adll_value(u32 pup_values[MAX_INTERFACE_NUM * MAX_BUS_NUM],344 int write_adll_value(u32 pup_values[MAX_INTERFACE_NUM * MAX_BUS_NUM],
26 static struct write_supp_result wr_supp_res[MAX_INTERFACE_NUM][MAX_BUS_NUM];72 u8 rl_values[NUM_OF_CS][MAX_BUS_NUM][MAX_INTERFACE_NUM]; in ddr3_tip_dynamic_read_leveling()152 for (bus_num = 0; bus_num < MAX_BUS_NUM; bus_num++) in ddr3_tip_dynamic_read_leveling()529 u32 phyreg3_arr[MAX_INTERFACE_NUM][MAX_BUS_NUM]; in ddr3_tip_dynamic_per_bit_read_leveling()535 int per_bit_rl_pup_status[MAX_INTERFACE_NUM][MAX_BUS_NUM]; in ddr3_tip_dynamic_per_bit_read_leveling()536 u32 data2_write[MAX_INTERFACE_NUM][MAX_BUS_NUM]; in ddr3_tip_dynamic_per_bit_read_leveling()965 u32 res_values[MAX_INTERFACE_NUM * MAX_BUS_NUM] = { 0 }; in ddr3_tip_dynamic_write_leveling()968 u8 wl_values[NUM_OF_CS][MAX_BUS_NUM][MAX_INTERFACE_NUM]; in ddr3_tip_dynamic_write_leveling()
11 #define MAX_BUS_NUM 5 macro
65 struct bus_params as_bus_params[MAX_BUS_NUM];
27 u8 bus_end_window[NUM_OF_CENTRAL_TYPES][MAX_INTERFACE_NUM][MAX_BUS_NUM];28 u8 bus_start_window[NUM_OF_CENTRAL_TYPES][MAX_INTERFACE_NUM][MAX_BUS_NUM];29 u8 centralization_state[MAX_INTERFACE_NUM][MAX_BUS_NUM];
21 u32 phy_reg_bk[MAX_INTERFACE_NUM][MAX_BUS_NUM][BUS_WIDTH_IN_BITS];23 u32 training_res[MAX_INTERFACE_NUM * MAX_BUS_NUM * BUS_WIDTH_IN_BITS *163 [MAX_INTERFACE_NUM * MAX_BUS_NUM * BUS_WIDTH_IN_BITS * search + in ddr3_tip_get_buf_ptr()164 interface_num * MAX_BUS_NUM * BUS_WIDTH_IN_BITS]; in ddr3_tip_get_buf_ptr()1008 u8 bit_bit_mask[MAX_BUS_NUM] = { 0 }, bit_bit_mask_active = 0; in ddr3_tip_ip_training_wrapper()
249 extern u8 vref_window_size[MAX_INTERFACE_NUM][MAX_BUS_NUM];336 int print_adll(u32 dev_num, u32 adll[MAX_INTERFACE_NUM * MAX_BUS_NUM]);
17 #define MAX_TOTAL_BUS_NUM (MAX_INTERFACE_NUM * MAX_BUS_NUM)
52 #define MAX_BUS_NUM 256 macro
162 for (bus = 0; bus < MAX_BUS_NUM; bus++) in pci_bus_scan()