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Searched refs:CPLL_MODE_SHIFT (Results 1 – 8 of 8) sorted by relevance

/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dcru_rk3066.h166 CPLL_MODE_SHIFT = 8, enumerator
167 CPLL_MODE_MASK = 3 << CPLL_MODE_SHIFT,
H A Dcru_rk3288.h240 CPLL_MODE_SHIFT = 8, enumerator
241 CPLL_MODE_MASK = CRU_MODE_MASK << CPLL_MODE_SHIFT,
H A Dcru_px30.h170 CPLL_MODE_SHIFT = 2, enumerator
171 CPLL_MODE_MASK = 3 << CPLL_MODE_SHIFT,
H A Dcru_rk3188.h176 CPLL_MODE_SHIFT = 8, enumerator
/OK3568_Linux_fs/u-boot/drivers/clk/rockchip/
H A Dclk_rk3188.c253 0xff, APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT, in rkclk_pll_get_rate()
424 CPLL_MODE_MASK << CPLL_MODE_SHIFT, in rkclk_init()
426 CPLL_MODE_SLOW << CPLL_MODE_SHIFT); in rkclk_init()
494 CPLL_MODE_MASK << CPLL_MODE_SHIFT, in rkclk_init()
496 CPLL_MODE_NORMAL << CPLL_MODE_SHIFT); in rkclk_init()
H A Dclk_rk3288.c277 0xff, APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT, in rkclk_pll_get_rate()
496 CPLL_MODE_SLOW << CPLL_MODE_SHIFT); in rockchip_vop_set_clk()
508 CPLL_MODE_NORMAL << CPLL_MODE_SHIFT); in rockchip_vop_set_clk()
533 CPLL_MODE_SLOW << CPLL_MODE_SHIFT); in rockchip_vop_set_clk()
545 CPLL_MODE_NORMAL << CPLL_MODE_SHIFT); in rockchip_vop_set_clk()
597 CPLL_MODE_SLOW << CPLL_MODE_SHIFT); in rkclk_init()
670 CPLL_MODE_NORMAL << CPLL_MODE_SHIFT); in rkclk_init()
H A Dclk_rk3066.c255 0xff, APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT, in rkclk_pll_get_rate()
396 CPLL_MODE_SLOW << CPLL_MODE_SHIFT); in rkclk_init()
466 CPLL_MODE_NORMAL << CPLL_MODE_SHIFT); in rkclk_init()
H A Dclk_px30.c94 APLL_MODE_SHIFT, DPLL_MODE_SHIFT, CPLL_MODE_SHIFT,