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Searched refs:XC_REG (Results 1 – 16 of 16) sorted by relevance

/utopia/UTPA2-700.0.x/modules/graphic/hal/k6/gop/
H A DregGOP.h123 #define XC_REG(bk, reg) (SC1_REG_BASE+((MS_U32)(bk)<<16) + (reg) * 2) macro
125 #define REG_SC_BK00_00_L XC_REG(0x00, 0x00)
126 #define REG_SC_BK00_05_L XC_REG(0x00, 0x05)
127 #define REG_SC_BK00_06_L XC_REG(0x00, 0x06)
128 #define REG_SC_BK01_02_L XC_REG(0x01, 0x02)
129 #define REG_SC_BK01_05_L XC_REG(0x01, 0x05)
130 #define REG_SC_BK01_1E_L XC_REG(0x01, 0x1E)
131 #define REG_SC_BK01_21_L XC_REG(0x01, 0x21)
132 #define REG_SC_BK02_5F_L XC_REG(0x02, 0x5F)
133 #define REG_SC_BK0F_2B_L XC_REG(0x0F, 0x2B)
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/utopia/UTPA2-700.0.x/modules/graphic/hal/k6lite/gop/
H A DregGOP.h123 #define XC_REG(bk, reg) (SC1_REG_BASE+((MS_U32)(bk)<<16) + (reg) * 2) macro
125 #define REG_SC_BK00_00_L XC_REG(0x00, 0x00)
126 #define REG_SC_BK00_05_L XC_REG(0x00, 0x05)
127 #define REG_SC_BK00_06_L XC_REG(0x00, 0x06)
128 #define REG_SC_BK01_02_L XC_REG(0x01, 0x02)
129 #define REG_SC_BK01_05_L XC_REG(0x01, 0x05)
130 #define REG_SC_BK01_1E_L XC_REG(0x01, 0x1E)
131 #define REG_SC_BK01_21_L XC_REG(0x01, 0x21)
132 #define REG_SC_BK02_5F_L XC_REG(0x02, 0x5F)
133 #define REG_SC_BK0F_2B_L XC_REG(0x0F, 0x2B)
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/utopia/UTPA2-700.0.x/modules/graphic/hal/M7821/gop/
H A DregGOP.h124 #define XC_REG(bk, reg) (SC1_REG_BASE+((MS_U32)(bk)<<16) + (reg) * 2) macro
126 #define REG_SC_BK00_00_L XC_REG(0x00, 0x00)
127 #define REG_SC_BK00_05_L XC_REG(0x00, 0x05)
128 #define REG_SC_BK00_06_L XC_REG(0x00, 0x06)
129 #define REG_SC_BK01_02_L XC_REG(0x01, 0x02)
130 #define REG_SC_BK01_05_L XC_REG(0x01, 0x05)
131 #define REG_SC_BK01_1E_L XC_REG(0x01, 0x1E)
132 #define REG_SC_BK01_21_L XC_REG(0x01, 0x21)
133 #define REG_SC_BK02_5F_L XC_REG(0x02, 0x5F)
134 #define REG_SC_BK0F_2B_L XC_REG(0x0F, 0x2B)
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/utopia/UTPA2-700.0.x/modules/graphic/hal/maserati/gop/
H A DregGOP.h124 #define XC_REG(bk, reg) (SC1_REG_BASE+((MS_U32)(bk)<<16) + (reg) * 2) macro
126 #define REG_SC_BK00_00_L XC_REG(0x00, 0x00)
127 #define REG_SC_BK00_05_L XC_REG(0x00, 0x05)
128 #define REG_SC_BK00_06_L XC_REG(0x00, 0x06)
129 #define REG_SC_BK01_02_L XC_REG(0x01, 0x02)
130 #define REG_SC_BK01_05_L XC_REG(0x01, 0x05)
131 #define REG_SC_BK01_1E_L XC_REG(0x01, 0x1E)
132 #define REG_SC_BK01_21_L XC_REG(0x01, 0x21)
133 #define REG_SC_BK02_5F_L XC_REG(0x02, 0x5F)
134 #define REG_SC_BK0F_2B_L XC_REG(0x0F, 0x2B)
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/utopia/UTPA2-700.0.x/modules/graphic/hal/curry/gop/
H A DregGOP.h123 #define XC_REG(bk, reg) (SC1_REG_BASE+((MS_U32)(bk)<<16) + (reg) * 2) macro
125 #define REG_SC_BK00_00_L XC_REG(0x00, 0x00)
126 #define REG_SC_BK00_05_L XC_REG(0x00, 0x05)
127 #define REG_SC_BK00_06_L XC_REG(0x00, 0x06)
128 #define REG_SC_BK01_02_L XC_REG(0x01, 0x02)
129 #define REG_SC_BK01_05_L XC_REG(0x01, 0x05)
130 #define REG_SC_BK01_21_L XC_REG(0x01, 0x21)
131 #define REG_SC_BK02_5F_L XC_REG(0x02, 0x5F)
132 #define REG_SC_BK0F_2B_L XC_REG(0x0F, 0x2B)
133 #define REG_SC_BK10_23_L XC_REG(0x10, 0x23)
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/utopia/UTPA2-700.0.x/modules/graphic/hal/kano/gop/
H A DregGOP.h123 #define XC_REG(bk, reg) (SC1_REG_BASE+((MS_U32)(bk)<<16) + (reg) * 2) macro
125 #define REG_SC_BK00_00_L XC_REG(0x00, 0x00)
126 #define REG_SC_BK00_05_L XC_REG(0x00, 0x05)
127 #define REG_SC_BK00_06_L XC_REG(0x00, 0x06)
128 #define REG_SC_BK01_02_L XC_REG(0x01, 0x02)
129 #define REG_SC_BK01_05_L XC_REG(0x01, 0x05)
130 #define REG_SC_BK01_1E_L XC_REG(0x01, 0x1E)
131 #define REG_SC_BK01_21_L XC_REG(0x01, 0x21)
132 #define REG_SC_BK02_5F_L XC_REG(0x02, 0x5F)
133 #define REG_SC_BK0F_2B_L XC_REG(0x0F, 0x2B)
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/utopia/UTPA2-700.0.x/modules/graphic/hal/kastor/gop/
H A DregGOP.h123 #define XC_REG(bk, reg) (SC1_REG_BASE+((MS_U32)(bk)<<16) + (reg) * 2) macro
125 #define REG_SC_BK00_00_L XC_REG(0x00, 0x00)
126 #define REG_SC_BK00_05_L XC_REG(0x00, 0x05)
127 #define REG_SC_BK00_06_L XC_REG(0x00, 0x06)
128 #define REG_SC_BK01_02_L XC_REG(0x01, 0x02)
129 #define REG_SC_BK01_05_L XC_REG(0x01, 0x05)
130 #define REG_SC_BK01_1E_L XC_REG(0x01, 0x1E)
131 #define REG_SC_BK02_5F_L XC_REG(0x02, 0x5F)
132 #define REG_SC_BK0F_2B_L XC_REG(0x0F, 0x2B)
133 #define REG_SC_BK10_23_L XC_REG(0x10, 0x23)
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/utopia/UTPA2-700.0.x/modules/graphic/hal/M7621/gop/
H A DregGOP.h123 #define XC_REG(bk, reg) (SC1_REG_BASE+((MS_U32)(bk)<<16) + (reg) * 2) macro
125 #define REG_SC_BK00_00_L XC_REG(0x00, 0x00)
126 #define REG_SC_BK00_05_L XC_REG(0x00, 0x05)
127 #define REG_SC_BK00_06_L XC_REG(0x00, 0x06)
128 #define REG_SC_BK01_02_L XC_REG(0x01, 0x02)
129 #define REG_SC_BK01_05_L XC_REG(0x01, 0x05)
130 #define REG_SC_BK01_1E_L XC_REG(0x01, 0x1E)
131 #define REG_SC_BK01_21_L XC_REG(0x01, 0x21)
132 #define REG_SC_BK02_5F_L XC_REG(0x02, 0x5F)
133 #define REG_SC_BK0F_2B_L XC_REG(0x0F, 0x2B)
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/utopia/UTPA2-700.0.x/modules/graphic/hal/maxim/gop/
H A DregGOP.h123 #define XC_REG(bk, reg) (SC1_REG_BASE+((MS_U32)(bk)<<16) + (reg) * 2) macro
125 #define REG_SC_BK00_00_L XC_REG(0x00, 0x00)
126 #define REG_SC_BK00_05_L XC_REG(0x00, 0x05)
127 #define REG_SC_BK00_06_L XC_REG(0x00, 0x06)
128 #define REG_SC_BK01_02_L XC_REG(0x01, 0x02)
129 #define REG_SC_BK01_05_L XC_REG(0x01, 0x05)
130 #define REG_SC_BK01_1E_L XC_REG(0x01, 0x1E)
131 #define REG_SC_BK01_21_L XC_REG(0x01, 0x21)
132 #define REG_SC_BK02_5F_L XC_REG(0x02, 0x5F)
133 #define REG_SC_BK0F_2B_L XC_REG(0x0F, 0x2B)
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/utopia/UTPA2-700.0.x/modules/graphic/hal/manhattan/gop/
H A DregGOP.h122 #define XC_REG(bk, reg) (SC1_REG_BASE+((MS_U32)(bk)<<16) + (reg) * 2) macro
124 #define REG_SC_BK00_00_L XC_REG(0x00, 0x00)
125 #define REG_SC_BK00_05_L XC_REG(0x00, 0x05)
126 #define REG_SC_BK00_06_L XC_REG(0x00, 0x06)
127 #define REG_SC_BK01_02_L XC_REG(0x01, 0x02)
128 #define REG_SC_BK01_05_L XC_REG(0x01, 0x05)
129 #define REG_SC_BK01_1E_L XC_REG(0x01, 0x1E)
130 #define REG_SC_BK01_21_L XC_REG(0x01, 0x21)
131 #define REG_SC_BK02_5F_L XC_REG(0x02, 0x5F)
132 #define REG_SC_BK0F_2B_L XC_REG(0x0F, 0x2B)
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/utopia/UTPA2-700.0.x/modules/graphic/hal/macan/gop/
H A DregGOP.h122 #define XC_REG(bk, reg) (SC1_REG_BASE+((MS_U32)(bk)<<16) + (reg) * 2) macro
124 #define REG_SC_BK00_00_L XC_REG(0x00, 0x00)
125 #define REG_SC_BK00_05_L XC_REG(0x00, 0x05)
126 #define REG_SC_BK00_06_L XC_REG(0x00, 0x06)
127 #define REG_SC_BK00_40_L XC_REG(0x00, 0x40)
128 #define REG_SC_BK01_02_L XC_REG(0x01, 0x02)
129 #define REG_SC_BK02_5F_L XC_REG(0x02, 0x5F)
130 #define REG_SC_BK02_0A_L XC_REG(0x02, 0x0A)
131 #define REG_SC_BK0F_2B_L XC_REG(0x0F, 0x2B)
132 #define REG_SC_BK10_23_L XC_REG(0x10, 0x23)
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/utopia/UTPA2-700.0.x/modules/graphic/hal/messi/gop/
H A DregGOP.h122 #define XC_REG(bk, reg) (SC1_REG_BASE+((MS_U32)(bk)<<16) + (reg) * 2) macro
124 #define REG_SC_BK00_00_L XC_REG(0x00, 0x00)
125 #define REG_SC_BK00_05_L XC_REG(0x00, 0x05)
126 #define REG_SC_BK00_06_L XC_REG(0x00, 0x06)
127 #define REG_SC_BK01_02_L XC_REG(0x01, 0x02)
128 #define REG_SC_BK02_5F_L XC_REG(0x02, 0x5F)
129 #define REG_SC_BK0F_2B_L XC_REG(0x0F, 0x2B)
130 #define REG_SC_BK10_23_L XC_REG(0x10, 0x23)
131 #define REG_SC_BK10_50_L XC_REG(0x10, 0x50)
132 #define REG_SC_BK10_5B_L XC_REG(0x10, 0x5B)
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/utopia/UTPA2-700.0.x/modules/graphic/hal/mainz/gop/
H A DregGOP.h122 #define XC_REG(bk, reg) (SC1_REG_BASE+((MS_U32)(bk)<<16) + (reg) * 2) macro
124 #define REG_SC_BK00_00_L XC_REG(0x00, 0x00)
125 #define REG_SC_BK00_05_L XC_REG(0x00, 0x05)
126 #define REG_SC_BK00_06_L XC_REG(0x00, 0x06)
127 #define REG_SC_BK01_02_L XC_REG(0x01, 0x02)
128 #define REG_SC_BK02_5F_L XC_REG(0x02, 0x5F)
129 #define REG_SC_BK0F_2B_L XC_REG(0x0F, 0x2B)
130 #define REG_SC_BK10_23_L XC_REG(0x10, 0x23)
131 #define REG_SC_BK10_50_L XC_REG(0x10, 0x50)
132 #define REG_SC_BK10_5B_L XC_REG(0x10, 0x5B)
[all …]
/utopia/UTPA2-700.0.x/modules/graphic/hal/mooney/gop/
H A DregGOP.h122 #define XC_REG(bk, reg) (SC1_REG_BASE+((MS_U32)(bk)<<16) + (reg) * 2) macro
124 #define REG_SC_BK00_00_L XC_REG(0x00, 0x00)
125 #define REG_SC_BK00_05_L XC_REG(0x00, 0x05)
126 #define REG_SC_BK00_06_L XC_REG(0x00, 0x06)
127 #define REG_SC_BK01_02_L XC_REG(0x01, 0x02)
128 #define REG_SC_BK02_5F_L XC_REG(0x02, 0x5F)
129 #define REG_SC_BK0F_2B_L XC_REG(0x0F, 0x2B)
130 #define REG_SC_BK10_23_L XC_REG(0x10, 0x23)
131 #define REG_SC_BK10_5B_L XC_REG(0x10, 0x5B)
132 #define REG_SC_BK12_03_L XC_REG(0x12, 0x03)
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/utopia/UTPA2-700.0.x/modules/graphic/hal/mustang/gop/
H A DregGOP.h119 #define XC_REG(bk, reg) (SC1_REG_BASE+((MS_U32)(bk)<<16) + (reg) * 2) macro
121 #define REG_SC_BK00_00_L XC_REG(0x00, 0x00)
122 #define REG_SC_BK00_05_L XC_REG(0x00, 0x05)
123 #define REG_SC_BK00_06_L XC_REG(0x00, 0x06)
124 #define REG_SC_BK01_02_L XC_REG(0x01, 0x02)
125 #define REG_SC_BK02_5F_L XC_REG(0x02, 0x5F)
126 #define REG_SC_BK10_23_L XC_REG(0x10, 0x23)
127 #define REG_SC_BK10_50_L XC_REG(0x10, 0x50)
128 #define REG_SC_BK10_5B_L XC_REG(0x10, 0x5B)
129 #define REG_SC_BK12_03_L XC_REG(0x12, 0x03)
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/utopia/UTPA2-700.0.x/modules/graphic/hal/maldives/gop/
H A DregGOP.h119 #define XC_REG(bk, reg) (SC1_REG_BASE+((MS_U32)(bk)<<16) + (reg) * 2) macro
121 #define REG_SC_BK00_00_L XC_REG(0x00, 0x00)
122 #define REG_SC_BK00_05_L XC_REG(0x00, 0x05)
123 #define REG_SC_BK00_06_L XC_REG(0x00, 0x06)
124 #define REG_SC_BK01_02_L XC_REG(0x01, 0x02)
125 #define REG_SC_BK02_5F_L XC_REG(0x02, 0x5F)
126 #define REG_SC_BK10_23_L XC_REG(0x10, 0x23)
127 #define REG_SC_BK10_50_L XC_REG(0x10, 0x50)
128 #define REG_SC_BK10_5B_L XC_REG(0x10, 0x5B)
129 #define REG_SC_BK12_03_L XC_REG(0x12, 0x03)
[all …]