Lines Matching refs:XC_REG
123 #define XC_REG(bk, reg) (SC1_REG_BASE+((MS_U32)(bk)<<16) + (reg) * 2) macro
125 #define REG_SC_BK00_00_L XC_REG(0x00, 0x00)
126 #define REG_SC_BK00_05_L XC_REG(0x00, 0x05)
127 #define REG_SC_BK00_06_L XC_REG(0x00, 0x06)
128 #define REG_SC_BK01_02_L XC_REG(0x01, 0x02)
129 #define REG_SC_BK01_05_L XC_REG(0x01, 0x05)
130 #define REG_SC_BK01_1E_L XC_REG(0x01, 0x1E)
131 #define REG_SC_BK01_21_L XC_REG(0x01, 0x21)
132 #define REG_SC_BK02_5F_L XC_REG(0x02, 0x5F)
133 #define REG_SC_BK0F_2B_L XC_REG(0x0F, 0x2B)
134 #define REG_SC_BK10_23_L XC_REG(0x10, 0x23)
135 #define REG_SC_BK10_5B_L XC_REG(0x10, 0x5B)
136 #define REG_SC_BK12_03_L XC_REG(0x12, 0x03)
137 #define REG_SC_BK37_22_L XC_REG(0x37, 0x22)
138 #define REG_SC_BK37_24_L XC_REG(0x37, 0x24)
139 #define REG_SC_BK37_28_L XC_REG(0x37, 0x28)
140 #define REG_SC_BK3D_0D_L XC_REG(0x3D, 0x0D)
141 #define REG_SC_BK40_22_L XC_REG(0x40, 0x22)
142 #define REG_SC_BK40_23_L XC_REG(0x40, 0x23)
143 #define REG_SC_BK40_24_L XC_REG(0x40, 0x24)
144 #define REG_SC_BK40_25_L XC_REG(0x40, 0x25)
145 #define REG_SC_BK7F_10_L XC_REG(0x7F, 0x10)
146 #define REG_SC_BK7F_11_L XC_REG(0x7F, 0x11)
147 #define REG_SC_BK7F_18_L XC_REG(0x7F, 0x18)
148 #define REG_SC_BKC9_50_L XC_REG(0xC9, 0x50)
149 #define REG_SC_BKC9_51_L XC_REG(0xC9, 0x51)
150 #define REG_SC_BKC9_52_L XC_REG(0xC9, 0x52)
151 #define REG_SC_BKCB_48_L XC_REG(0xCB, 0x48)
153 #define REG_SC_BK80_05_L XC_REG(0x80, 0x05)