Lines Matching refs:XC_REG
122 #define XC_REG(bk, reg) (SC1_REG_BASE+((MS_U32)(bk)<<16) + (reg) * 2) macro
124 #define REG_SC_BK00_00_L XC_REG(0x00, 0x00)
125 #define REG_SC_BK00_05_L XC_REG(0x00, 0x05)
126 #define REG_SC_BK00_06_L XC_REG(0x00, 0x06)
127 #define REG_SC_BK01_02_L XC_REG(0x01, 0x02)
128 #define REG_SC_BK02_5F_L XC_REG(0x02, 0x5F)
129 #define REG_SC_BK0F_2B_L XC_REG(0x0F, 0x2B)
130 #define REG_SC_BK10_23_L XC_REG(0x10, 0x23)
131 #define REG_SC_BK10_50_L XC_REG(0x10, 0x50)
132 #define REG_SC_BK10_5B_L XC_REG(0x10, 0x5B)
133 #define REG_SC_BK12_03_L XC_REG(0x12, 0x03)
134 #define REG_SC_BK37_22_L XC_REG(0x37, 0x22)
135 #define REG_SC_BK37_24_L XC_REG(0x37, 0x24)
136 #define REG_SC_BK37_28_L XC_REG(0x37, 0x28)
137 #define REG_SC_BK3D_0D_L XC_REG(0x3D, 0x0D)
138 #define REG_SC_BK3E_28_L XC_REG(0x3E, 0x28)
139 #define REG_SC_BK40_22_L XC_REG(0x40, 0x22)
140 #define REG_SC_BK40_23_L XC_REG(0x40, 0x23)
141 #define REG_SC_BK40_24_L XC_REG(0x40, 0x24)
142 #define REG_SC_BK40_25_L XC_REG(0x40, 0x25)
143 #define REG_SC_BK7F_10_L XC_REG(0x7F, 0x10)