| /utopia/UTPA2-700.0.x/modules/demodulator/hal/maldives/demod/ |
| H A D | halDMD_INTERN_DVBT2.c | 184 #define T2_BW_VAL 0x04 macro
282 if(MDrv_SYS_DMD_VD_MBX_WriteDSPReg((MS_U32)E_DMD_T2_BW, T2_BW_VAL) != TRUE) in INTERN_DVBT2_DSPReg_Init()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/manhattan/demod/ |
| H A D | halDMD_INTERN_DVBT2.c | 184 #define T2_BW_VAL 0x04 macro
293 if(MDrv_SYS_DMD_VD_MBX_WriteDSPReg((MS_U32)E_DMD_T2_BW, T2_BW_VAL) != TRUE) in INTERN_DVBT2_DSPReg_Init()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/macan/demod/ |
| H A D | halDMD_INTERN_DVBT2.c | 189 #define T2_BW_VAL 0x04 macro
302 if(MDrv_SYS_DMD_VD_MBX_WriteDSPReg((MS_U32)E_DMD_T2_BW, T2_BW_VAL) != TRUE) in INTERN_DVBT2_DSPReg_Init()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/mustang/demod/ |
| H A D | halDMD_INTERN_DVBT2.c | 193 #define T2_BW_VAL 0x04 macro
307 if(MDrv_SYS_DMD_VD_MBX_WriteDSPReg((MS_U32)E_DMD_T2_BW, T2_BW_VAL) != TRUE) in INTERN_DVBT2_DSPReg_Init()
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| /utopia/UTPA2-700.0.x/modules/demodulator/drv/dvb_extdemod/ |
| H A D | drvDMD_EXTERN_MSB123xc.c | 369 #define T2_BW_VAL 0x04 macro
382 T2_BW_VAL, T2_FC_L_VAL, T2_FC_H_VAL, T2_TS_SERIAL_VAL, T2_TS_CLK_RATE_VAL,
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| H A D | drvDMD_EXTERN_MSB124x.c | 260 #define T2_BW_VAL 0x04 macro
280 T2_BW_VAL, T2_FC_L_VAL, T2_FC_H_VAL, T2_TS_SERIAL_VAL, T2_TS_CLK_RATE_VAL,
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/maserati/demod/ |
| H A D | halDMD_INTERN_DVBT2.c | 184 #define T2_BW_VAL 0x04 macro
299 if(MDrv_SYS_DMD_VD_MBX_WriteDSPReg((MS_U32)E_DMD_T2_BW, T2_BW_VAL) != TRUE) in INTERN_DVBT2_DSPReg_Init()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/kano/demod/ |
| H A D | halDMD_INTERN_DVBT2.c | 184 #define T2_BW_VAL 0x04 macro
299 if(MDrv_SYS_DMD_VD_MBX_WriteDSPReg((MS_U32)E_DMD_T2_BW, T2_BW_VAL) != TRUE) in INTERN_DVBT2_DSPReg_Init()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/M7621/demod/ |
| H A D | halDMD_INTERN_DVBT2.c | 192 #define T2_BW_VAL 0x04 macro
312 if(MDrv_SYS_DMD_VD_MBX_WriteDSPReg((MS_U32)E_DMD_T2_BW, T2_BW_VAL) != TRUE) in INTERN_DVBT2_DSPReg_Init()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/k6/demod/ |
| H A D | halDMD_INTERN_DVBT2.c | 184 #define T2_BW_VAL 0x04 macro
299 if(MDrv_SYS_DMD_VD_MBX_WriteDSPReg((MS_U32)E_DMD_T2_BW, T2_BW_VAL) != TRUE) in INTERN_DVBT2_DSPReg_Init()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/curry/demod/ |
| H A D | halDMD_INTERN_DVBT2.c | 184 #define T2_BW_VAL 0x04 macro
299 if(MDrv_SYS_DMD_VD_MBX_WriteDSPReg((MS_U32)E_DMD_T2_BW, T2_BW_VAL) != TRUE) in INTERN_DVBT2_DSPReg_Init()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/k6lite/demod/ |
| H A D | halDMD_INTERN_DVBT2.c | 184 #define T2_BW_VAL 0x04 macro
299 if(MDrv_SYS_DMD_VD_MBX_WriteDSPReg((MS_U32)E_DMD_T2_BW, T2_BW_VAL) != TRUE) in INTERN_DVBT2_DSPReg_Init()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/M7821/demod/ |
| H A D | halDMD_INTERN_DVBT2.c | 184 #define T2_BW_VAL 0x04 macro
299 if(MDrv_SYS_DMD_VD_MBX_WriteDSPReg((MS_U32)E_DMD_T2_BW, T2_BW_VAL) != TRUE) in INTERN_DVBT2_DSPReg_Init()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/maxim/demod/ |
| H A D | halDMD_INTERN_DVBT2.c | 192 #define T2_BW_VAL 0x04 macro
312 if(MDrv_SYS_DMD_VD_MBX_WriteDSPReg((MS_U32)E_DMD_T2_BW, T2_BW_VAL) != TRUE) in INTERN_DVBT2_DSPReg_Init()
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