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Searched refs:STC_SYNTH_DEFAULT (Results 1 – 14 of 14) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dmx/drv/tsp/
H A DdrvTSP.c2736 HAL_TSP_Stc_ctrl(u32EngId, STC_SYNTH_DEFAULT); in _TSP_PCR_Adjust()
3747 HAL_TSP_Stc_ctrl(u8ii, STC_SYNTH_DEFAULT);
4604 u32CW_New = (((STC_SYNTH_DEFAULT >> 16) * 100) / u32Percentage) << 16;
4605 u32CW_New += (((STC_SYNTH_DEFAULT & 0xFFFF) * 100) / u32Percentage);
4609 u32CW_New = (((STC_SYNTH_DEFAULT >> 16) * u32Percentage) / 100) << 16;
4610 u32CW_New += (((STC_SYNTH_DEFAULT & 0xFFFF) * u32Percentage) / 100);
/utopia/UTPA2-700.0.x/modules/dmx/hal/messi/tsp/
H A DregTSP.h205 #define STC_SYNTH_DEFAULT 0x28000000UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/mainz/tsp/
H A DregTSP.h205 #define STC_SYNTH_DEFAULT 0x28000000UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/mooney/tsp/
H A DregTSP.h207 #define STC_SYNTH_DEFAULT 0x28000000UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/maldives/tsp/
H A DregTSP.h235 #define STC_SYNTH_DEFAULT 0x28000000 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tsp/
H A DregTSP.h239 #define STC_SYNTH_DEFAULT 0x28000000UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tsp/
H A DregTSP.h230 #define STC_SYNTH_DEFAULT 0x28000000UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/mustang/tsp/
H A DregTSP.h245 #define STC_SYNTH_DEFAULT 0x28000000UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tsp/
H A DregTSP.h249 #define STC_SYNTH_DEFAULT 0x28000000UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tsp/
H A DregTSP.h249 #define STC_SYNTH_DEFAULT 0x28000000UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tsp/
H A DregTSP.h256 #define STC_SYNTH_DEFAULT 0x14000000UL macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tsp/
H A DregTSP.h256 #define STC_SYNTH_DEFAULT 0x14000000UL macro
/utopia/UTPA2-700.0.x/modules/dmx/drv/tsp3/
H A DdrvTSP.c2186 HAL_TSP_Stc_ctrl(u32EngId, STC_SYNTH_DEFAULT); in _TSP_PCR_Adjust()
3301 HAL_TSP_Stc_ctrl(u8ii, STC_SYNTH_DEFAULT); in _TSP_Init()
4441 …u64CW_New = (((MS_U64)STC_SYNTH_DEFAULT) & 0xFFFFFFFFUL) * (((MS_U64)_ptsp_res->_u32StcAdjustUnit)… in MDrv_TSP_STCClk_Adjust()
/utopia/UTPA2-700.0.x/modules/dmx/drv/tsp4/
H A DdrvTSP2.c2014 …#define STC_SYNTH_DEFAULT 0x28000000 // @F_TODO do we have to seperate 27M and 90K clk mode? plz… in _TSP_ISR() macro
2037 HAL_TSP_SetSTCSynth(u32PcrDstSTC, STC_SYNTH_DEFAULT); in _TSP_ISR()
7245 …u64CW_New = (((MS_U64)STC_SYNTH_DEFAULT) & 0xFFFFFFFFUL) * (((MS_U64)_ptsp_res->_u32StcAdjustUnit)… in MDrv_TSP_STCClk_Adjust()