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Searched refs:REG_PKT_VS_CFG_35 (Results 1 – 12 of 12) sorted by relevance

/utopia/UTPA2-700.0.x/modules/hdmi/hal/curry/hdmitx/
H A DhalHDMITx.c2293 MHal_HDMITx_Mask_Write(HDMITX_REG_BASE, REG_PKT_VS_CFG_35, 0x0005, 0x0000); in MHal_HDMITx_SendPacket()
2303 MHal_HDMITx_Write(HDMITX_REG_BASE, REG_PKT_VS_CFG_35, (ucChkSum << 8) | 0x0001); in MHal_HDMITx_SendPacket()
2308 …MHal_HDMITx_Write(HDMITX_REG_BASE, REG_PKT_VS_CFG_35, ((ucChkSum<<8) | (gbGeneralPktList[ucInfoPkt… in MHal_HDMITx_SendPacket()
2337 MHal_HDMITx_Write(HDMITX_REG_BASE, REG_PKT_VS_CFG_35, (ucChkSum << 8) | 0x0001); in MHal_HDMITx_SendPacket()
2342 …MHal_HDMITx_Write(HDMITX_REG_BASE, REG_PKT_VS_CFG_35, ((ucChkSum << 8) | (HDMITX_PACKET_VS_FCNT <<… in MHal_HDMITx_SendPacket()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/k6/hdmitx/
H A DhalHDMITx.c2291 MHal_HDMITx_Mask_Write(HDMITX_REG_BASE, REG_PKT_VS_CFG_35, 0x0005, 0x0000); in MHal_HDMITx_SendPacket()
2301 MHal_HDMITx_Write(HDMITX_REG_BASE, REG_PKT_VS_CFG_35, (ucChkSum << 8) | 0x0001); in MHal_HDMITx_SendPacket()
2306 …MHal_HDMITx_Write(HDMITX_REG_BASE, REG_PKT_VS_CFG_35, ((ucChkSum<<8) | (gbGeneralPktList[ucInfoPkt… in MHal_HDMITx_SendPacket()
2335 MHal_HDMITx_Write(HDMITX_REG_BASE, REG_PKT_VS_CFG_35, (ucChkSum << 8) | 0x0001); in MHal_HDMITx_SendPacket()
2340 …MHal_HDMITx_Write(HDMITX_REG_BASE, REG_PKT_VS_CFG_35, ((ucChkSum << 8) | (HDMITX_PACKET_VS_FCNT <<… in MHal_HDMITx_SendPacket()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/kano/hdmitx/
H A DhalHDMITx.c2378 MHal_HDMITx_Mask_Write(HDMITX_REG_BASE, REG_PKT_VS_CFG_35, 0x0005, 0x0000); in MHal_HDMITx_SendPacket()
2388 MHal_HDMITx_Write(HDMITX_REG_BASE, REG_PKT_VS_CFG_35, (ucChkSum << 8) | 0x0001); in MHal_HDMITx_SendPacket()
2393 …MHal_HDMITx_Write(HDMITX_REG_BASE, REG_PKT_VS_CFG_35, ((ucChkSum<<8) | (gbGeneralPktList[ucInfoPkt… in MHal_HDMITx_SendPacket()
2422 MHal_HDMITx_Write(HDMITX_REG_BASE, REG_PKT_VS_CFG_35, (ucChkSum << 8) | 0x0001); in MHal_HDMITx_SendPacket()
2427 …MHal_HDMITx_Write(HDMITX_REG_BASE, REG_PKT_VS_CFG_35, ((ucChkSum << 8) | (HDMITX_PACKET_VS_FCNT <<… in MHal_HDMITx_SendPacket()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/k6lite/hdmitx/
H A DhalHDMITx.c2324 MHal_HDMITx_Mask_Write(HDMITX_REG_BASE, REG_PKT_VS_CFG_35, 0x0005, 0x0000); in MHal_HDMITx_SendPacket()
2334 MHal_HDMITx_Write(HDMITX_REG_BASE, REG_PKT_VS_CFG_35, (ucChkSum << 8) | 0x0001); in MHal_HDMITx_SendPacket()
2339 …MHal_HDMITx_Write(HDMITX_REG_BASE, REG_PKT_VS_CFG_35, ((ucChkSum<<8) | (gbGeneralPktList[ucInfoPkt… in MHal_HDMITx_SendPacket()
2368 MHal_HDMITx_Write(HDMITX_REG_BASE, REG_PKT_VS_CFG_35, (ucChkSum << 8) | 0x0001); in MHal_HDMITx_SendPacket()
2373 …MHal_HDMITx_Write(HDMITX_REG_BASE, REG_PKT_VS_CFG_35, ((ucChkSum << 8) | (HDMITX_PACKET_VS_FCNT <<… in MHal_HDMITx_SendPacket()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/hdmitx/
H A DhalHDMITx.c2664 MHal_HDMITx_Mask_Write(HDMITX_REG_BASE, REG_PKT_VS_CFG_35, 0x0005, 0x0000); in MHal_HDMITx_SendPacket()
2674 MHal_HDMITx_Write(HDMITX_REG_BASE, REG_PKT_VS_CFG_35, (ucChkSum << 8) | 0x0001); in MHal_HDMITx_SendPacket()
2679 …MHal_HDMITx_Write(HDMITX_REG_BASE, REG_PKT_VS_CFG_35, ((ucChkSum<<8) | (gbGeneralPktList[ucInfoPkt… in MHal_HDMITx_SendPacket()
2708 MHal_HDMITx_Write(HDMITX_REG_BASE, REG_PKT_VS_CFG_35, (ucChkSum << 8) | 0x0001); in MHal_HDMITx_SendPacket()
2713 …MHal_HDMITx_Write(HDMITX_REG_BASE, REG_PKT_VS_CFG_35, ((ucChkSum << 8) | (HDMITX_PACKET_VS_FCNT <<… in MHal_HDMITx_SendPacket()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/hdmitx/
H A DhalHDMITx.c2779 MHal_HDMITx_Mask_Write(HDMITX_REG_BASE, REG_PKT_VS_CFG_35, 0x0005, 0x0000); in MHal_HDMITx_SendPacket()
2789 MHal_HDMITx_Write(HDMITX_REG_BASE, REG_PKT_VS_CFG_35, (ucChkSum << 8) | 0x0001); in MHal_HDMITx_SendPacket()
2794 …MHal_HDMITx_Write(HDMITX_REG_BASE, REG_PKT_VS_CFG_35, ((ucChkSum<<8) | (gbGeneralPktList[ucInfoPkt… in MHal_HDMITx_SendPacket()
2823 MHal_HDMITx_Write(HDMITX_REG_BASE, REG_PKT_VS_CFG_35, (ucChkSum << 8) | 0x0001); in MHal_HDMITx_SendPacket()
2828 …MHal_HDMITx_Write(HDMITX_REG_BASE, REG_PKT_VS_CFG_35, ((ucChkSum << 8) | (HDMITX_PACKET_VS_FCNT <<… in MHal_HDMITx_SendPacket()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/k6/hdmitx/include/
H A DregHDMITx.h208 #define REG_PKT_VS_CFG_35 0x35U macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/k6lite/hdmitx/include/
H A DregHDMITx.h208 #define REG_PKT_VS_CFG_35 0x35U macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/kano/hdmitx/include/
H A DregHDMITx.h208 #define REG_PKT_VS_CFG_35 0x35U macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/curry/hdmitx/include/
H A DregHDMITx.h208 #define REG_PKT_VS_CFG_35 0x35U macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/hdmitx/include/
H A DregHDMITx.h212 #define REG_PKT_VS_CFG_35 0x35U macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/hdmitx/include/
H A DregHDMITx.h212 #define REG_PKT_VS_CFG_35 0x35U macro