Home
last modified time | relevance | path

Searched refs:REG_EVD_BASE (Results 1 – 25 of 52) sorted by relevance

123

/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6/hvd_v3/
H A DregHVD_EX.h232 #define REG_EVD_BASE (0x1C00) macro
537 #define EVD_REG_RESET (REG_EVD_BASE + ((0x0001) << 1))
554 #define EVD_BBU23_SETTING (REG_EVD_BASE + ((0x0001B) << 1))
559 #define REG_CLK_EVD (REG_EVD_BASE + ((0x002d) << 1))
573 #define EVD_BBU_MIU_SETTING (REG_EVD_BASE + ((0x00040) << 1))
587 #define EVD_REG_VP9_MODE (REG_EVD_BASE + ((0x001b) << 1))
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/curry/hvd_v3/
H A DregHVD_EX.h232 #define REG_EVD_BASE (0x1C00) macro
537 #define EVD_REG_RESET (REG_EVD_BASE + ((0x0001) << 1))
554 #define EVD_BBU23_SETTING (REG_EVD_BASE + ((0x0001B) << 1))
559 #define REG_CLK_EVD (REG_EVD_BASE + ((0x002d) << 1))
573 #define EVD_BBU_MIU_SETTING (REG_EVD_BASE + ((0x00040) << 1))
587 #define EVD_REG_VP9_MODE (REG_EVD_BASE + ((0x001b) << 1))
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6lite/hvd_v3/
H A DregHVD_EX.h232 #define REG_EVD_BASE (0x1C00) macro
537 #define EVD_REG_RESET (REG_EVD_BASE + ((0x0001) << 1))
554 #define EVD_BBU23_SETTING (REG_EVD_BASE + ((0x0001B) << 1))
559 #define REG_CLK_EVD (REG_EVD_BASE + ((0x002d) << 1))
573 #define EVD_BBU_MIU_SETTING (REG_EVD_BASE + ((0x00040) << 1))
587 #define EVD_REG_VP9_MODE (REG_EVD_BASE + ((0x001b) << 1))
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7621/hvd_v3/
H A DregHVD_EX.h232 #define REG_EVD_BASE (0x60B00) macro
397 #define EVD_REG_RESET (REG_EVD_BASE + ((0x0001) << 1))
414 #define REG_CLK_EVD (REG_EVD_BASE + ((0x002d) << 1))
426 #define EVD_BBU_MIU_SETTING (REG_EVD_BASE + ((0x00040) << 1))
440 #define EVD_REG_VP9_MODE (REG_EVD_BASE + ((0x001b) << 1))
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maxim/hvd_v3/
H A DregHVD_EX.h232 #define REG_EVD_BASE (0x60B00) macro
397 #define EVD_REG_RESET (REG_EVD_BASE + ((0x0001) << 1))
414 #define REG_CLK_EVD (REG_EVD_BASE + ((0x002d) << 1))
426 #define EVD_BBU_MIU_SETTING (REG_EVD_BASE + ((0x00040) << 1))
440 #define EVD_REG_VP9_MODE (REG_EVD_BASE + ((0x001b) << 1))
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mooney/hvd_v3/
H A DregHVD_EX.h232 #define REG_EVD_BASE (0x60B00) macro
409 #define EVD_REG_RESET (REG_EVD_BASE + ((0x0001) << 1))
426 #define REG_CLK_EVD (REG_EVD_BASE + ((0x002d) << 1))
438 #define EVD_BBU_MIU_SETTING (REG_EVD_BASE + ((0x00040) << 1))
452 #define EVD_REG_VP9_MODE (REG_EVD_BASE + ((0x001b) << 1))
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/messi/hvd_v3/
H A DregHVD_EX.h232 #define REG_EVD_BASE (0x60B00) macro
392 #define EVD_REG_RESET (REG_EVD_BASE + ((0x0001) << 1))
409 #define EVD_REG_BBU_MIU_WIDTH (REG_EVD_BASE + ((0x0040) << 1)) // Miami, Clippers…
423 #define EVD_REG_VP9_MODE (REG_EVD_BASE + ((0x001b) << 1))
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mainz/hvd_v3/
H A DregHVD_EX.h232 #define REG_EVD_BASE (0x60B00) macro
392 #define EVD_REG_RESET (REG_EVD_BASE + ((0x0001) << 1))
409 #define EVD_REG_BBU_MIU_WIDTH (REG_EVD_BASE + ((0x0040) << 1)) // Miami, Clippers…
423 #define EVD_REG_VP9_MODE (REG_EVD_BASE + ((0x001b) << 1))
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maldives/hvd_v3/
H A DregHVD_EX.h232 #define REG_EVD_BASE (0x60B00) macro
384 #define EVD_REG_RESET (REG_EVD_BASE + ((0x0001) << 1))
400 #define EVD_REG_BBU_MIU_WIDTH (REG_EVD_BASE + ((0x0040) << 1)) // Miami, Clippers…
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mustang/hvd_v3/
H A DregHVD_EX.h232 #define REG_EVD_BASE (0x60B00) macro
388 #define EVD_REG_RESET (REG_EVD_BASE + ((0x0001) << 1))
404 #define EVD_REG_BBU_MIU_WIDTH (REG_EVD_BASE + ((0x0040) << 1)) // Miami, Clippers…
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7821/hvd_v3/
H A DregHVD_EX.h232 #define REG_EVD_BASE (0x60B00) macro
397 #define EVD_REG_RESET (REG_EVD_BASE + ((0x0001) << 1))
424 #define EVD_REG_VP9_MODE (REG_EVD_BASE + ((0x001b) << 1))
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/manhattan/hvd_v3/
H A DregHVD_EX.h232 #define REG_EVD_BASE (0x60B00) macro
397 #define EVD_REG_RESET (REG_EVD_BASE + ((0x0001) << 1))
424 #define EVD_REG_VP9_MODE (REG_EVD_BASE + ((0x001b) << 1))
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/macan/hvd_v3/
H A DregHVD_EX.h232 #define REG_EVD_BASE (0x60B00) macro
398 #define EVD_REG_RESET (REG_EVD_BASE + ((0x0001) << 1))
425 #define EVD_REG_VP9_MODE (REG_EVD_BASE + ((0x001b) << 1))
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maserati/hvd_v3/
H A DregHVD_EX.h232 #define REG_EVD_BASE (0x60B00) macro
397 #define EVD_REG_RESET (REG_EVD_BASE + ((0x0001) << 1))
424 #define EVD_REG_VP9_MODE (REG_EVD_BASE + ((0x001b) << 1))
/utopia/UTPA2-700.0.x/modules/vdec_lite/hal/kano/vpu_lite/
H A DhalVPU_EX.c5014 _HVD_Write2Byte(HVD_REG_ESB_ST_ADDR_L(REG_EVD_BASE), HVD_LWORD(u32StAddr_main >> 3)); in HAL_VPU_EX_SetLockDownRegister()
5015 _HVD_Write2Byte(HVD_REG_ESB_ST_ADDR_H(REG_EVD_BASE), HVD_HWORD(u32StAddr_main >> 3)); in HAL_VPU_EX_SetLockDownRegister()
5016 _HVD_Write2Byte(HVD_REG_ESB_LENGTH_L(REG_EVD_BASE), HVD_LWORD(u32Length_main >> 3)); in HAL_VPU_EX_SetLockDownRegister()
5017 _HVD_Write2Byte(HVD_REG_ESB_LENGTH_H(REG_EVD_BASE), HVD_HWORD(u32Length_main >> 3)); in HAL_VPU_EX_SetLockDownRegister()
5019 _HVD_Write2Byte(HVD_REG_ESB_ST_ADDR_L_BS2(REG_EVD_BASE), HVD_LWORD(u32StAddr_sub >> 3)); in HAL_VPU_EX_SetLockDownRegister()
5020 _HVD_Write2Byte(HVD_REG_ESB_ST_ADDR_H_BS2(REG_EVD_BASE), HVD_HWORD(u32StAddr_sub >> 3)); in HAL_VPU_EX_SetLockDownRegister()
5021 _HVD_Write2Byte(HVD_REG_ESB_LENGTH_L_BS2(REG_EVD_BASE), HVD_LWORD(u32Length_sub >> 3)); in HAL_VPU_EX_SetLockDownRegister()
5022 _HVD_Write2Byte(HVD_REG_ESB_LENGTH_H_BS2(REG_EVD_BASE), HVD_HWORD(u32Length_sub >> 3)); in HAL_VPU_EX_SetLockDownRegister()
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/mustang/hvd_ex/
H A DregHVD_EX.h232 #define REG_EVD_BASE (0x60B00) macro
382 #define EVD_REG_RESET (REG_EVD_BASE + ((0x0001) << 1))
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maldives/hvd_ex/
H A DregHVD_EX.h232 #define REG_EVD_BASE (0x60B00) macro
382 #define EVD_REG_RESET (REG_EVD_BASE + ((0x0001) << 1))
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/M7621/hvd_ex/
H A DregHVD_EX.h222 #define REG_EVD_BASE (0x60B00) macro
371 #define EVD_REG_RESET (REG_EVD_BASE + ((0x0001) << 1))
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/messi/hvd_ex/
H A DregHVD_EX.h222 #define REG_EVD_BASE (0x60B00) macro
371 #define EVD_REG_RESET (REG_EVD_BASE + ((0x0001) << 1))
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/manhattan/hvd_ex/
H A DregHVD_EX.h222 #define REG_EVD_BASE (0x60B00) macro
371 #define EVD_REG_RESET (REG_EVD_BASE + ((0x0001) << 1))
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maxim/hvd_ex/
H A DregHVD_EX.h222 #define REG_EVD_BASE (0x60B00) macro
371 #define EVD_REG_RESET (REG_EVD_BASE + ((0x0001) << 1))
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/mainz/hvd_ex/
H A DregHVD_EX.h222 #define REG_EVD_BASE (0x60B00) macro
371 #define EVD_REG_RESET (REG_EVD_BASE + ((0x0001) << 1))
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/maserati/hvd_ex/
H A DregHVD_EX.h222 #define REG_EVD_BASE (0x60B00) macro
371 #define EVD_REG_RESET (REG_EVD_BASE + ((0x0001) << 1))
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/M7821/hvd_ex/
H A DregHVD_EX.h222 #define REG_EVD_BASE (0x60B00) macro
371 #define EVD_REG_RESET (REG_EVD_BASE + ((0x0001) << 1))
/utopia/UTPA2-700.0.x/modules/vdec_v2/hal/macan/hvd_ex/
H A DregHVD_EX.h222 #define REG_EVD_BASE (0x60B00) macro
371 #define EVD_REG_RESET (REG_EVD_BASE + ((0x0001) << 1))

123