Searched refs:REG_COMBOPHY0_CONFIG_49 (Results 1 – 12 of 12) sorted by relevance
| /utopia/UTPA2-700.0.x/modules/hdmi/hal/k6/hdmitx/include/ |
| H A D | regHDMITx.h | 143 #define REG_COMBOPHY0_CONFIG_49 0x49U macro
|
| /utopia/UTPA2-700.0.x/modules/hdmi/hal/k6lite/hdmitx/include/ |
| H A D | regHDMITx.h | 143 #define REG_COMBOPHY0_CONFIG_49 0x49U macro
|
| /utopia/UTPA2-700.0.x/modules/hdmi/hal/kano/hdmitx/include/ |
| H A D | regHDMITx.h | 143 #define REG_COMBOPHY0_CONFIG_49 0x49U macro
|
| /utopia/UTPA2-700.0.x/modules/hdmi/hal/curry/hdmitx/include/ |
| H A D | regHDMITx.h | 143 #define REG_COMBOPHY0_CONFIG_49 0x49U macro
|
| /utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/hdmitx/include/ |
| H A D | regHDMITx.h | 143 #define REG_COMBOPHY0_CONFIG_49 0x49U macro
|
| /utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/hdmitx/include/ |
| H A D | regHDMITx.h | 143 #define REG_COMBOPHY0_CONFIG_49 0x49U macro
|
| /utopia/UTPA2-700.0.x/modules/hdmi/hal/curry/hdmitx/ |
| H A D | halHDMITx.c | 2013 …MHal_HDMITx_Mask_Write(HDMIRX_COMBOPHY0_REG_BASE, REG_COMBOPHY0_CONFIG_49, 0xE000, 0xA000); //[13.… in MHal_HDMITx_RxBypass_Mode()
2016 …MHal_HDMITx_Mask_Write(HDMIRX_COMBOPHY0_REG_BASE, REG_COMBOPHY0_CONFIG_49, 0x1FFF, 0x0C6A); //chan… in MHal_HDMITx_RxBypass_Mode()
|
| /utopia/UTPA2-700.0.x/modules/hdmi/hal/k6/hdmitx/ |
| H A D | halHDMITx.c | 2012 …MHal_HDMITx_Mask_Write(HDMIRX_COMBOPHY0_REG_BASE, REG_COMBOPHY0_CONFIG_49, 0xE000, 0xA000); //[13.… in MHal_HDMITx_RxBypass_Mode()
2015 …MHal_HDMITx_Mask_Write(HDMIRX_COMBOPHY0_REG_BASE, REG_COMBOPHY0_CONFIG_49, 0x1FFF, 0x0C6A); //chan… in MHal_HDMITx_RxBypass_Mode()
|
| /utopia/UTPA2-700.0.x/modules/hdmi/hal/kano/hdmitx/ |
| H A D | halHDMITx.c | 2098 …MHal_HDMITx_Mask_Write(HDMIRX_COMBOPHY0_REG_BASE, REG_COMBOPHY0_CONFIG_49, 0xE000, 0xA000); //[13.… in MHal_HDMITx_RxBypass_Mode()
2101 …MHal_HDMITx_Mask_Write(HDMIRX_COMBOPHY0_REG_BASE, REG_COMBOPHY0_CONFIG_49, 0x1FFF, 0x0C6A); //chan… in MHal_HDMITx_RxBypass_Mode()
|
| /utopia/UTPA2-700.0.x/modules/hdmi/hal/k6lite/hdmitx/ |
| H A D | halHDMITx.c | 2044 …MHal_HDMITx_Mask_Write(HDMIRX_COMBOPHY0_REG_BASE, REG_COMBOPHY0_CONFIG_49, 0xE000, 0xA000); //[13.… in MHal_HDMITx_RxBypass_Mode()
2047 …MHal_HDMITx_Mask_Write(HDMIRX_COMBOPHY0_REG_BASE, REG_COMBOPHY0_CONFIG_49, 0x1FFF, 0x0C6A); //chan… in MHal_HDMITx_RxBypass_Mode()
|
| /utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/hdmitx/ |
| H A D | halHDMITx.c | 2384 …MHal_HDMITx_Mask_Write(HDMIRX_COMBOPHY0_REG_BASE, REG_COMBOPHY0_CONFIG_49, 0xE000, 0xA000); //[13.… in MHal_HDMITx_RxBypass_Mode()
2387 …MHal_HDMITx_Mask_Write(HDMIRX_COMBOPHY0_REG_BASE, REG_COMBOPHY0_CONFIG_49, 0x1FFF, 0x0C6A); //chan… in MHal_HDMITx_RxBypass_Mode()
|
| /utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/hdmitx/ |
| H A D | halHDMITx.c | 2499 …MHal_HDMITx_Mask_Write(HDMIRX_COMBOPHY0_REG_BASE, REG_COMBOPHY0_CONFIG_49, 0xE000, 0xA000); //[13.… in MHal_HDMITx_RxBypass_Mode()
2502 …MHal_HDMITx_Mask_Write(HDMIRX_COMBOPHY0_REG_BASE, REG_COMBOPHY0_CONFIG_49, 0x1FFF, 0x0C6A); //chan… in MHal_HDMITx_RxBypass_Mode()
|