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Searched refs:REG_CLKGEN0_TSP_INVERT (Results 1 – 13 of 13) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tsp/
H A DregTSP.h131 #define REG_CLKGEN0_TSP_INVERT 0x0002 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tsp/
H A DregTSP.h117 #define REG_CLKGEN0_TSP_INVERT 0x0002 macro
H A DhalTSP.c425 … pstClkStatus->bInvert = !!(TSP_CLKGEN0_REG(REG_CLKGEN0_TSP_CLK) & REG_CLKGEN0_TSP_INVERT); in HAL_TSP_GetClockSetting()
/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tsp/
H A DregTSP.h126 #define REG_CLKGEN0_TSP_INVERT 0x0002 macro
H A DhalTSP.c538 … pstClkStatus->bInvert = !!(TSP_CLKGEN0_REG(REG_CLKGEN0_TSP_CLK) & REG_CLKGEN0_TSP_INVERT); in HAL_TSP_GetClockSetting()
/utopia/UTPA2-700.0.x/modules/dscmb/hal/kano/nsk2/
H A DregTSP.h126 #define REG_CLKGEN0_TSP_INVERT 0x0002 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6/nsk2/
H A DregTSP.h123 #define REG_CLKGEN0_TSP_INVERT 0x0002 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/
H A DregTSP.h124 #define REG_CLKGEN0_TSP_INVERT 0x0002 macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/
H A DregTSP.h124 #define REG_CLKGEN0_TSP_INVERT 0x0002 macro
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsp/
H A DregTSP.h123 #define REG_CLKGEN0_TSP_INVERT 0x0002 macro
H A DhalTSP.c548 … pstClkStatus->bInvert = !!(TSP_CLKGEN0_REG(REG_CLKGEN0_TSP_CLK) & REG_CLKGEN0_TSP_INVERT); in HAL_TSP_GetClockSetting()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/
H A DregTSP.h124 #define REG_CLKGEN0_TSP_INVERT 0x0002 macro
H A DhalTSP.c462 … pstClkStatus->bInvert = !!(TSP_CLKGEN0_REG(REG_CLKGEN0_TSP_CLK) & REG_CLKGEN0_TSP_INVERT); in HAL_TSP_GetClockSetting()