Searched refs:REG_CLKGEN0_S2P_IN_CLK_SHIFT (Results 1 – 11 of 11) sorted by relevance
80 #define REG_CLKGEN0_S2P_IN_CLK_SHIFT 0 macro
86 #define REG_CLKGEN0_S2P_IN_CLK_SHIFT 0 macro
1249 …0_REG(REG_CLKGEN0_S2P_IN_CLK_SRC) & ~(REG_CLKGEN0_S2P_IN_CLK_MASK << REG_CLKGEN0_S2P_IN_CLK_SHIFT)) in HAL_TSP_TsOutPadCfg()1250 …| ((eInPad & REG_CLKGEN0_S2P_IN_CLK_SRC_MASK) << (REG_CLKGEN0_S2P_IN_CLK_SHIFT + REG_CLKGEN0_S2P_I… in HAL_TSP_TsOutPadCfg()
83 #define REG_CLKGEN0_S2P_IN_CLK_SHIFT 0 macro
1280 …0_REG(REG_CLKGEN0_S2P_IN_CLK_SRC) & ~(REG_CLKGEN0_S2P_IN_CLK_MASK << REG_CLKGEN0_S2P_IN_CLK_SHIFT)) in HAL_TSP_TsOutPadCfg()1281 …| ((eInPad & REG_CLKGEN0_S2P_IN_CLK_SRC_MASK) << (REG_CLKGEN0_S2P_IN_CLK_SHIFT + REG_CLKGEN0_S2P_I… in HAL_TSP_TsOutPadCfg()
1183 …0_REG(REG_CLKGEN0_S2P_IN_CLK_SRC) & ~(REG_CLKGEN0_S2P_IN_CLK_MASK << REG_CLKGEN0_S2P_IN_CLK_SHIFT)) in HAL_TSP_TsOutPadCfg()1184 …| ((eInPad & REG_CLKGEN0_S2P_IN_CLK_SRC_MASK) << (REG_CLKGEN0_S2P_IN_CLK_SHIFT + REG_CLKGEN0_S2P_I… in HAL_TSP_TsOutPadCfg()