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Searched refs:REG_AES_DSCMB7_BASE (Results 1 – 12 of 12) sorted by relevance

/utopia/UTPA2-700.0.x/modules/security/hal/macan/aesdma/
H A DhalAESDMA.c133 static REG_AES_DSCMB7Ctrl *_AESDSCMB7Ctrl = (REG_AES_DSCMB7Ctrl*)REG_AES_DSCMB7_BASE;
175 _AESDSCMB7Ctrl = (REG_AES_DSCMB7Ctrl*)(_u32RegBase + REG_AES_DSCMB7_BASE); in HAL_AESDMA_SetBank()
H A DregAESDMA.h164 #define REG_AES_DSCMB7_BASE 0xE7B00UL //(0x73D00/2 + 0x40) * 4 macro
/utopia/UTPA2-700.0.x/modules/security/hal/maxim/aesdma/
H A DhalAESDMA.c132 static REG_AES_DSCMB7Ctrl *_AESDSCMB7Ctrl = (REG_AES_DSCMB7Ctrl*)REG_AES_DSCMB7_BASE;
175 _AESDSCMB7Ctrl = (REG_AES_DSCMB7Ctrl*)(_u32RegBase + REG_AES_DSCMB7_BASE); in HAL_AESDMA_SetBank()
H A DregAESDMA.h166 #define REG_AES_DSCMB7_BASE 0xE7B00UL //(0x73D00/2 + 0x40) * 4 macro
/utopia/UTPA2-700.0.x/modules/security/hal/manhattan/aesdma/
H A DhalAESDMA.c132 static REG_AES_DSCMB7Ctrl *_AESDSCMB7Ctrl = (REG_AES_DSCMB7Ctrl*)REG_AES_DSCMB7_BASE;
175 _AESDSCMB7Ctrl = (REG_AES_DSCMB7Ctrl*)(_u32RegBase + REG_AES_DSCMB7_BASE); in HAL_AESDMA_SetBank()
H A DregAESDMA.h166 #define REG_AES_DSCMB7_BASE 0xE7B00UL //(0x73D00/2 + 0x40) * 4 macro
/utopia/UTPA2-700.0.x/modules/security/hal/M7621/aesdma/
H A DhalAESDMA.c132 static REG_AES_DSCMB7Ctrl *_AESDSCMB7Ctrl = (REG_AES_DSCMB7Ctrl*)REG_AES_DSCMB7_BASE;
175 _AESDSCMB7Ctrl = (REG_AES_DSCMB7Ctrl*)(_u32RegBase + REG_AES_DSCMB7_BASE); in HAL_AESDMA_SetBank()
H A DregAESDMA.h166 #define REG_AES_DSCMB7_BASE 0xE7B00UL //(0x73D00/2 + 0x40) * 4 macro
/utopia/UTPA2-700.0.x/modules/security/hal/maserati/aesdma/
H A DhalAESDMA.c148 static REG_AES_DSCMB7Ctrl *_AESDSCMB7Ctrl = (REG_AES_DSCMB7Ctrl*)REG_AES_DSCMB7_BASE;
191 _AESDSCMB7Ctrl = (REG_AES_DSCMB7Ctrl*)(_u32RegBase + REG_AES_DSCMB7_BASE); in HAL_AESDMA_SetBank()
H A DregAESDMA.h172 #define REG_AES_DSCMB7_BASE 0xE7B00UL //(0x73D00/2 + 0x40) * 4 macro
/utopia/UTPA2-700.0.x/modules/security/hal/M7821/aesdma/
H A DhalAESDMA.c148 static REG_AES_DSCMB7Ctrl *_AESDSCMB7Ctrl = (REG_AES_DSCMB7Ctrl*)REG_AES_DSCMB7_BASE;
191 _AESDSCMB7Ctrl = (REG_AES_DSCMB7Ctrl*)(_u32RegBase + REG_AES_DSCMB7_BASE); in HAL_AESDMA_SetBank()
H A DregAESDMA.h172 #define REG_AES_DSCMB7_BASE 0xE7B00UL //(0x73D00/2 + 0x40) * 4 macro