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Searched refs:OPENRISC_IP_1_SIZE (Results 1 – 22 of 22) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dmx/hal/messi/tsp/
H A DregTSP.h1192 #define OPENRISC_IP_1_SIZE 0x00020000UL macro
H A DhalTSP.c2935 …IsCover(phyAddr, phyAddr + u32Size, OPENRISC_IP_1_ADDR, OPENRISC_IP_1_ADDR + OPENRISC_IP_1_SIZE) || in HAL_TSP_SetFwDbgMem()
/utopia/UTPA2-700.0.x/modules/dmx/hal/mainz/tsp/
H A DregTSP.h1192 #define OPENRISC_IP_1_SIZE 0x00020000UL macro
H A DhalTSP.c2939 …IsCover(phyAddr, phyAddr + u32Size, OPENRISC_IP_1_ADDR, OPENRISC_IP_1_ADDR + OPENRISC_IP_1_SIZE) || in HAL_TSP_SetFwDbgMem()
/utopia/UTPA2-700.0.x/modules/dmx/hal/mooney/tsp/
H A DregTSP.h1190 #define OPENRISC_IP_1_SIZE 0x00020000UL macro
H A DhalTSP.c2950 …IsCover(phyAddr, phyAddr + u32Size, OPENRISC_IP_1_ADDR, OPENRISC_IP_1_ADDR + OPENRISC_IP_1_SIZE) || in HAL_TSP_SetFwDbgMem()
/utopia/UTPA2-700.0.x/modules/dmx/hal/maldives/tsp/
H A DregTSP.h1726 #define OPENRISC_IP_1_SIZE 0x00020000 macro
H A DhalTSP.c4344 …IsCover(phyAddr, phyAddr + u32Size, OPENRISC_IP_1_ADDR, OPENRISC_IP_1_ADDR + OPENRISC_IP_1_SIZE) || in HAL_TSP_SetFwDbgMem()
/utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tsp/
H A DregTSP.h1882 #define OPENRISC_IP_1_SIZE 0x00020000UL macro
H A DhalTSP.c4763 …ver(phyhwaddr, phyhwaddr + u32Size, OPENRISC_IP_1_ADDR, OPENRISC_IP_1_ADDR + OPENRISC_IP_1_SIZE) || in HAL_TSP_SetFwDbgMem()
/utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tsp/
H A DregTSP.h1902 #define OPENRISC_IP_1_SIZE 0x00020000UL macro
H A DhalTSP.c4726 …ver(phyhwaddr, phyhwaddr + u32Size, OPENRISC_IP_1_ADDR, OPENRISC_IP_1_ADDR + OPENRISC_IP_1_SIZE) || in HAL_TSP_SetFwDbgMem()
/utopia/UTPA2-700.0.x/modules/dmx/hal/mustang/tsp/
H A DregTSP.h2072 #define OPENRISC_IP_1_SIZE 0x00020000UL macro
H A DhalTSP.c5093 …ver(phyhwaddr, phyhwaddr + u32Size, OPENRISC_IP_1_ADDR, OPENRISC_IP_1_ADDR + OPENRISC_IP_1_SIZE) || in HAL_TSP_SetFwDbgMem()
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tsp/
H A DregTSP.h2077 #define OPENRISC_IP_1_SIZE 0x00020000UL macro
H A DhalTSP.c5418 …ver(phyhwaddr, phyhwaddr + u32Size, OPENRISC_IP_1_ADDR, OPENRISC_IP_1_ADDR + OPENRISC_IP_1_SIZE) || in HAL_TSP_SetFwDbgMem()
/utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tsp/
H A DregTSP.h2077 #define OPENRISC_IP_1_SIZE 0x00020000UL macro
H A DhalTSP.c5435 …ver(phyhwaddr, phyhwaddr + u32Size, OPENRISC_IP_1_ADDR, OPENRISC_IP_1_ADDR + OPENRISC_IP_1_SIZE) || in HAL_TSP_SetFwDbgMem()
/utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tsp/
H A DregTSP.h2069 #define OPENRISC_IP_1_SIZE 0x00020000UL macro
H A DhalTSP.c5491 …ver(phyhwaddr, phyhwaddr + u32Size, OPENRISC_IP_1_ADDR, OPENRISC_IP_1_ADDR + OPENRISC_IP_1_SIZE) || in HAL_TSP_SetFwDbgMem()
/utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tsp/
H A DregTSP.h2069 #define OPENRISC_IP_1_SIZE 0x00020000UL macro
H A DhalTSP.c5452 …ver(phyhwaddr, phyhwaddr + u32Size, OPENRISC_IP_1_ADDR, OPENRISC_IP_1_ADDR + OPENRISC_IP_1_SIZE) || in HAL_TSP_SetFwDbgMem()