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Searched refs:MIU2_REG_SEL4 (Results 1 – 20 of 20) sorted by relevance

/utopia/UTPA2-700.0.x/modules/vdec_lite/hal/kano/hvd_lite/
H A DhalHVD_EX.c235 …(((_HVD_Read2Byte(MIU0_REG_SEL4) & BIT(9)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(9)) == …
237 …(((_HVD_Read2Byte(MIU0_REG_SEL4) & BIT(4)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(4)) == …
238 …(((_HVD_Read2Byte(MIU0_REG_SEL4) & BIT(5)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(5)) == …
239 …(((_HVD_Read2Byte(MIU0_REG_SEL4) & BIT(11)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(11)) ==…
242 …D_Read2Byte(MIU0_REG_SEL4) & BIT(9)) == BIT(9)) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(9)) == …
244 …D_Read2Byte(MIU0_REG_SEL4) & BIT(4)) == BIT(4)) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(4)) == …
245 …D_Read2Byte(MIU0_REG_SEL4) & BIT(5)) == BIT(5)) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(5)) == …
246 …D_Read2Byte(MIU0_REG_SEL4) & BIT(11)) == BIT(11)) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(11)) ==…
249 …(((_HVD_Read2Byte(MIU0_REG_SEL4) & BIT(9)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(9)) == …
251 …(((_HVD_Read2Byte(MIU0_REG_SEL4) & BIT(4)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(4)) == …
[all …]
H A DregHVD_EX.h697 #define MIU2_REG_SEL4 (MIU2_REG_HVD_BASE+(( 0x007C)<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/manhattan/hvd_v3/
H A DhalHVD_EX.c239 … (((_HVD_Read2Byte(MIU0_REG_SEL4) & BIT(6)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(6)) == …
241 … (((_HVD_Read2Byte(MIU0_REG_SEL4) & BIT(2)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(2)) == …
242 … (((_HVD_Read2Byte(MIU0_REG_SEL4) & BIT(3)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(3)) == …
243 … (((_HVD_Read2Byte(MIU0_REG_SEL4) & BIT(0)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(0)) == …
246 …HVD_Read2Byte(MIU0_REG_SEL4) & BIT(6)) == BIT(6)) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(6)) == …
248 …HVD_Read2Byte(MIU0_REG_SEL4) & BIT(2)) == BIT(2)) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(2)) == …
249 …HVD_Read2Byte(MIU0_REG_SEL4) & BIT(3)) == BIT(3)) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(3)) == …
250 …HVD_Read2Byte(MIU0_REG_SEL4) & BIT(0)) == BIT(0)) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(0)) == …
253 … (((_HVD_Read2Byte(MIU0_REG_SEL4) & BIT(6)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(6)) == …
255 … (((_HVD_Read2Byte(MIU0_REG_SEL4) & BIT(2)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(2)) == …
[all …]
H A DregHVD_EX.h654 #define MIU2_REG_SEL4 (MIU2_REG_HVD_BASE+(( 0x007C)<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/macan/hvd_v3/
H A DhalHVD_EX.c225 … (((_HVD_Read2Byte(MIU0_REG_SEL4) & BIT(6)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(6)) == …
227 … (((_HVD_Read2Byte(MIU0_REG_SEL4) & BIT(2)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(2)) == …
228 … (((_HVD_Read2Byte(MIU0_REG_SEL4) & BIT(3)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(3)) == …
229 … (((_HVD_Read2Byte(MIU0_REG_SEL4) & BIT(0)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(0)) == …
232 …HVD_Read2Byte(MIU0_REG_SEL4) & BIT(6)) == BIT(6)) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(6)) == …
234 …HVD_Read2Byte(MIU0_REG_SEL4) & BIT(2)) == BIT(2)) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(2)) == …
235 …HVD_Read2Byte(MIU0_REG_SEL4) & BIT(3)) == BIT(3)) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(3)) == …
236 …HVD_Read2Byte(MIU0_REG_SEL4) & BIT(0)) == BIT(0)) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(0)) == …
239 … (((_HVD_Read2Byte(MIU0_REG_SEL4) & BIT(6)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(6)) == …
241 … (((_HVD_Read2Byte(MIU0_REG_SEL4) & BIT(2)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(2)) == …
[all …]
H A DregHVD_EX.h655 #define MIU2_REG_SEL4 (MIU2_REG_HVD_BASE+(( 0x007C)<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maserati/hvd_v3/
H A DhalHVD_EX.c240 … (((_HVD_Read2Byte(MIU0_REG_SEL4) & BIT(6)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(6)) == …
242 … (((_HVD_Read2Byte(MIU0_REG_SEL4) & BIT(2)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(2)) == …
243 … (((_HVD_Read2Byte(MIU0_REG_SEL4) & BIT(3)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(3)) == …
244 … (((_HVD_Read2Byte(MIU0_REG_SEL4) & BIT(0)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(0)) == …
247 …HVD_Read2Byte(MIU0_REG_SEL4) & BIT(6)) == BIT(6)) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(6)) == …
249 …HVD_Read2Byte(MIU0_REG_SEL4) & BIT(2)) == BIT(2)) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(2)) == …
250 …HVD_Read2Byte(MIU0_REG_SEL4) & BIT(3)) == BIT(3)) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(3)) == …
251 …HVD_Read2Byte(MIU0_REG_SEL4) & BIT(0)) == BIT(0)) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(0)) == …
254 … (((_HVD_Read2Byte(MIU0_REG_SEL4) & BIT(6)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(6)) == …
256 … (((_HVD_Read2Byte(MIU0_REG_SEL4) & BIT(2)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(2)) == …
[all …]
H A DregHVD_EX.h654 #define MIU2_REG_SEL4 (MIU2_REG_HVD_BASE+(( 0x007C)<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7821/hvd_v3/
H A DhalHVD_EX.c239 … (((_HVD_Read2Byte(MIU0_REG_SEL4) & BIT(6)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(6)) == …
241 … (((_HVD_Read2Byte(MIU0_REG_SEL4) & BIT(2)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(2)) == …
242 … (((_HVD_Read2Byte(MIU0_REG_SEL4) & BIT(3)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(3)) == …
243 … (((_HVD_Read2Byte(MIU0_REG_SEL4) & BIT(0)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(0)) == …
246 …HVD_Read2Byte(MIU0_REG_SEL4) & BIT(6)) == BIT(6)) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(6)) == …
248 …HVD_Read2Byte(MIU0_REG_SEL4) & BIT(2)) == BIT(2)) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(2)) == …
249 …HVD_Read2Byte(MIU0_REG_SEL4) & BIT(3)) == BIT(3)) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(3)) == …
250 …HVD_Read2Byte(MIU0_REG_SEL4) & BIT(0)) == BIT(0)) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(0)) == …
253 … (((_HVD_Read2Byte(MIU0_REG_SEL4) & BIT(6)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(6)) == …
255 … (((_HVD_Read2Byte(MIU0_REG_SEL4) & BIT(2)) == 0) && ((_HVD_Read2Byte(MIU2_REG_SEL4) & BIT(2)) == …
[all …]
H A DregHVD_EX.h654 #define MIU2_REG_SEL4 (MIU2_REG_HVD_BASE+(( 0x007C)<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/macan/vpu_v3/
H A DregVPU_EX.h436 #define MIU2_REG_SEL4 (MIU2_REG_HVD_BASE+(( 0x007C)<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/manhattan/vpu_v3/
H A DregVPU_EX.h444 #define MIU2_REG_SEL4 (MIU2_REG_HVD_BASE+(( 0x007C)<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/messi/vpu_v3/
H A DregVPU_EX.h444 #define MIU2_REG_SEL4 (MIU2_REG_HVD_BASE+(( 0x007C)<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mainz/vpu_v3/
H A DregVPU_EX.h444 #define MIU2_REG_SEL4 (MIU2_REG_HVD_BASE+(( 0x007C)<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7821/vpu_v3/
H A DregVPU_EX.h464 #define MIU2_REG_SEL4 (MIU2_REG_HVD_BASE+(( 0x007C)<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maserati/vpu_v3/
H A DregVPU_EX.h464 #define MIU2_REG_SEL4 (MIU2_REG_HVD_BASE+(( 0x007C)<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_lite/hal/kano/vpu_lite/
H A DregVPU_EX.h462 #define MIU2_REG_SEL4 (MIU2_REG_HVD_BASE+(( 0x007C)<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/messi/hvd_v3/
H A DregHVD_EX.h653 #define MIU2_REG_SEL4 (MIU2_REG_HVD_BASE+(( 0x007C)<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mainz/hvd_v3/
H A DregHVD_EX.h653 #define MIU2_REG_SEL4 (MIU2_REG_HVD_BASE+(( 0x007C)<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mooney/hvd_v3/
H A DregHVD_EX.h679 #define MIU2_REG_SEL4 (MIU2_REG_HVD_BASE+(( 0x007C)<<1)) macro