FRONTEND_REG_BASE (reference) in projects: utopia

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Searched refs:FRONTEND_REG_BASE (Results 1 – 11 of 11) sorted by relevance

/utopia/UTPA2-700.0.x/modules/demodulator/hal/k6lite/demod/
H A D	halDMD_INTERN_DVBS.c	240 #define FRONTEND_REG_BASE 0x2100 macro 241 #define _REG_FRONTEND(idx) (FRONTEND_REG_BASE + (idx)2) 3102 … status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x112, &u8Data);//FRONTEND_AGC_DEBUG_SEL in INTERN_DVBS_GetTunrSignalLevel_PWR() 3104 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FRONTEND_REG_BASE+0x112, u8Data); in INTERN_DVBS_GetTunrSignalLevel_PWR() 3106 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x02, &u8Data);//FRONTEND_LATCH in INTERN_DVBS_GetTunrSignalLevel_PWR() 3108 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FRONTEND_REG_BASE+0x02, u8Data); in INTERN_DVBS_GetTunrSignalLevel_PWR() 3110 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x122+1, &u8Data);//FRONTEND_AGC_DEBUG_OU… in INTERN_DVBS_GetTunrSignalLevel_PWR() 3112 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x12*2, &u8Data);//FRONTEND_AGC_DEBUG_OUT_… in INTERN_DVBS_GetTunrSignalLevel_PWR() 3117 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x02, &u8Data);//FRONTEND_LOAD0 in INTERN_DVBS_GetTunrSignalLevel_PWR() 3119 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FRONTEND_REG_BASE+0x02, u8Data); in INTERN_DVBS_GetTunrSignalLevel_PWR() [all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/M7621/demod/
H A D	halDMD_INTERN_DVBS.c	143 #define FRONTEND_REG_BASE 0x2800 macro 3038 … status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x112, &u8Data);//FRONTEND_AGC_DEBUG_SEL in INTERN_DVBS_GetTunrSignalLevel_PWR() 3040 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FRONTEND_REG_BASE+0x112, u8Data); in INTERN_DVBS_GetTunrSignalLevel_PWR() 3042 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x02, &u8Data);//FRONTEND_LATCH in INTERN_DVBS_GetTunrSignalLevel_PWR() 3044 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FRONTEND_REG_BASE+0x02, u8Data); in INTERN_DVBS_GetTunrSignalLevel_PWR() 3046 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x122+1, &u8Data);//FRONTEND_AGC_DEBUG_OU… in INTERN_DVBS_GetTunrSignalLevel_PWR() 3048 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x122, &u8Data);//FRONTEND_AGC_DEBUG_OUT_… in INTERN_DVBS_GetTunrSignalLevel_PWR() 3053 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x02, &u8Data);//FRONTEND_LOAD0 in INTERN_DVBS_GetTunrSignalLevel_PWR() 3055 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FRONTEND_REG_BASE+0x02, u8Data); in INTERN_DVBS_GetTunrSignalLevel_PWR() 4155 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE + 0x08*2 + 1,&agc_k); in INTERN_DVBS_Show_AGC_Info() [all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maxim/demod/
H A D	halDMD_INTERN_DVBS.c	143 #define FRONTEND_REG_BASE 0x2800 macro 3038 … status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x112, &u8Data);//FRONTEND_AGC_DEBUG_SEL in INTERN_DVBS_GetTunrSignalLevel_PWR() 3040 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FRONTEND_REG_BASE+0x112, u8Data); in INTERN_DVBS_GetTunrSignalLevel_PWR() 3042 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x02, &u8Data);//FRONTEND_LATCH in INTERN_DVBS_GetTunrSignalLevel_PWR() 3044 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FRONTEND_REG_BASE+0x02, u8Data); in INTERN_DVBS_GetTunrSignalLevel_PWR() 3046 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x122+1, &u8Data);//FRONTEND_AGC_DEBUG_OU… in INTERN_DVBS_GetTunrSignalLevel_PWR() 3048 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x122, &u8Data);//FRONTEND_AGC_DEBUG_OUT_… in INTERN_DVBS_GetTunrSignalLevel_PWR() 3053 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x02, &u8Data);//FRONTEND_LOAD0 in INTERN_DVBS_GetTunrSignalLevel_PWR() 3055 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FRONTEND_REG_BASE+0x02, u8Data); in INTERN_DVBS_GetTunrSignalLevel_PWR() 4155 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE + 0x08*2 + 1,&agc_k); in INTERN_DVBS_Show_AGC_Info() [all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/curry/demod/
H A D	halDMD_INTERN_DVBS.c	143 #define FRONTEND_REG_BASE 0x2800 macro 2883 … status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x112, &u8Data);//FRONTEND_AGC_DEBUG_SEL in INTERN_DVBS_GetTunrSignalLevel_PWR() 2885 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FRONTEND_REG_BASE+0x112, u8Data); in INTERN_DVBS_GetTunrSignalLevel_PWR() 2887 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x02, &u8Data);//FRONTEND_LATCH in INTERN_DVBS_GetTunrSignalLevel_PWR() 2889 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FRONTEND_REG_BASE+0x02, u8Data); in INTERN_DVBS_GetTunrSignalLevel_PWR() 2891 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x122+1, &u8Data);//FRONTEND_AGC_DEBUG_OU… in INTERN_DVBS_GetTunrSignalLevel_PWR() 2893 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x122, &u8Data);//FRONTEND_AGC_DEBUG_OUT_… in INTERN_DVBS_GetTunrSignalLevel_PWR() 2898 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x02, &u8Data);//FRONTEND_LOAD0 in INTERN_DVBS_GetTunrSignalLevel_PWR() 2900 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FRONTEND_REG_BASE+0x02, u8Data); in INTERN_DVBS_GetTunrSignalLevel_PWR() 4000 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE + 0x08*2 + 1,&agc_k); in INTERN_DVBS_Show_AGC_Info() [all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maserati/demod/
H A D	halDMD_INTERN_DVBS.c	143 #define FRONTEND_REG_BASE 0x2800 macro 3026 … status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x112, &u8Data);//FRONTEND_AGC_DEBUG_SEL in INTERN_DVBS_GetTunrSignalLevel_PWR() 3028 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FRONTEND_REG_BASE+0x112, u8Data); in INTERN_DVBS_GetTunrSignalLevel_PWR() 3030 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x02, &u8Data);//FRONTEND_LATCH in INTERN_DVBS_GetTunrSignalLevel_PWR() 3032 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FRONTEND_REG_BASE+0x02, u8Data); in INTERN_DVBS_GetTunrSignalLevel_PWR() 3034 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x122+1, &u8Data);//FRONTEND_AGC_DEBUG_OU… in INTERN_DVBS_GetTunrSignalLevel_PWR() 3036 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x122, &u8Data);//FRONTEND_AGC_DEBUG_OUT_… in INTERN_DVBS_GetTunrSignalLevel_PWR() 3041 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x02, &u8Data);//FRONTEND_LOAD0 in INTERN_DVBS_GetTunrSignalLevel_PWR() 3043 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FRONTEND_REG_BASE+0x02, u8Data); in INTERN_DVBS_GetTunrSignalLevel_PWR() 4143 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE + 0x08*2 + 1,&agc_k); in INTERN_DVBS_Show_AGC_Info() [all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/M7821/demod/
H A D	halDMD_INTERN_DVBS.c	143 #define FRONTEND_REG_BASE 0x2800 macro 3026 … status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x112, &u8Data);//FRONTEND_AGC_DEBUG_SEL in INTERN_DVBS_GetTunrSignalLevel_PWR() 3028 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FRONTEND_REG_BASE+0x112, u8Data); in INTERN_DVBS_GetTunrSignalLevel_PWR() 3030 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x02, &u8Data);//FRONTEND_LATCH in INTERN_DVBS_GetTunrSignalLevel_PWR() 3032 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FRONTEND_REG_BASE+0x02, u8Data); in INTERN_DVBS_GetTunrSignalLevel_PWR() 3034 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x122+1, &u8Data);//FRONTEND_AGC_DEBUG_OU… in INTERN_DVBS_GetTunrSignalLevel_PWR() 3036 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x122, &u8Data);//FRONTEND_AGC_DEBUG_OUT_… in INTERN_DVBS_GetTunrSignalLevel_PWR() 3041 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x02, &u8Data);//FRONTEND_LOAD0 in INTERN_DVBS_GetTunrSignalLevel_PWR() 3043 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FRONTEND_REG_BASE+0x02, u8Data); in INTERN_DVBS_GetTunrSignalLevel_PWR() 4143 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE + 0x08*2 + 1,&agc_k); in INTERN_DVBS_Show_AGC_Info() [all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/k6/demod/
H A D	halDMD_INTERN_DVBS.c	143 #define FRONTEND_REG_BASE 0x2800 macro 2883 … status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x112, &u8Data);//FRONTEND_AGC_DEBUG_SEL in INTERN_DVBS_GetTunrSignalLevel_PWR() 2885 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FRONTEND_REG_BASE+0x112, u8Data); in INTERN_DVBS_GetTunrSignalLevel_PWR() 2887 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x02, &u8Data);//FRONTEND_LATCH in INTERN_DVBS_GetTunrSignalLevel_PWR() 2889 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FRONTEND_REG_BASE+0x02, u8Data); in INTERN_DVBS_GetTunrSignalLevel_PWR() 2891 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x122+1, &u8Data);//FRONTEND_AGC_DEBUG_OU… in INTERN_DVBS_GetTunrSignalLevel_PWR() 2893 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x122, &u8Data);//FRONTEND_AGC_DEBUG_OUT_… in INTERN_DVBS_GetTunrSignalLevel_PWR() 2898 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x02, &u8Data);//FRONTEND_LOAD0 in INTERN_DVBS_GetTunrSignalLevel_PWR() 2900 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FRONTEND_REG_BASE+0x02, u8Data); in INTERN_DVBS_GetTunrSignalLevel_PWR() 4000 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE + 0x08*2 + 1,&agc_k); in INTERN_DVBS_Show_AGC_Info() [all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/kano/demod/
H A D	halDMD_INTERN_DVBS.c	143 #define FRONTEND_REG_BASE 0x2800 macro 2883 … status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x112, &u8Data);//FRONTEND_AGC_DEBUG_SEL in INTERN_DVBS_GetTunrSignalLevel_PWR() 2885 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FRONTEND_REG_BASE+0x112, u8Data); in INTERN_DVBS_GetTunrSignalLevel_PWR() 2887 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x02, &u8Data);//FRONTEND_LATCH in INTERN_DVBS_GetTunrSignalLevel_PWR() 2889 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FRONTEND_REG_BASE+0x02, u8Data); in INTERN_DVBS_GetTunrSignalLevel_PWR() 2891 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x122+1, &u8Data);//FRONTEND_AGC_DEBUG_OU… in INTERN_DVBS_GetTunrSignalLevel_PWR() 2893 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x122, &u8Data);//FRONTEND_AGC_DEBUG_OUT_… in INTERN_DVBS_GetTunrSignalLevel_PWR() 2898 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x02, &u8Data);//FRONTEND_LOAD0 in INTERN_DVBS_GetTunrSignalLevel_PWR() 2900 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FRONTEND_REG_BASE+0x02, u8Data); in INTERN_DVBS_GetTunrSignalLevel_PWR() 4000 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE + 0x08*2 + 1,&agc_k); in INTERN_DVBS_Show_AGC_Info() [all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/macan/demod/
H A D	halDMD_INTERN_DVBS.c	140 #define FRONTEND_REG_BASE 0x2800 macro 2951 MDrv_SYS_DMD_VD_MBX_ReadReg( FRONTEND_REG_BASE+0x7c2+1,&u8Data); in INTERN_DVBS_GetLock() 2953 MDrv_SYS_DMD_VD_MBX_ReadReg( FRONTEND_REG_BASE+0x7c2,&u8Data); in INTERN_DVBS_GetLock() 3013 … status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x112, &u8Data);//FRONTEND_AGC_DEBUG_SEL in INTERN_DVBS_GetTunrSignalLevel_PWR() 3015 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FRONTEND_REG_BASE+0x112, u8Data); in INTERN_DVBS_GetTunrSignalLevel_PWR() 3017 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x02, &u8Data);//FRONTEND_LATCH in INTERN_DVBS_GetTunrSignalLevel_PWR() 3019 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FRONTEND_REG_BASE+0x02, u8Data); in INTERN_DVBS_GetTunrSignalLevel_PWR() 3021 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x122+1, &u8Data);//FRONTEND_AGC_DEBUG_OU… in INTERN_DVBS_GetTunrSignalLevel_PWR() 3023 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x122, &u8Data);//FRONTEND_AGC_DEBUG_OUT_… in INTERN_DVBS_GetTunrSignalLevel_PWR() 3028 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x02, &u8Data);//FRONTEND_LOAD0 in INTERN_DVBS_GetTunrSignalLevel_PWR() [all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maldives/demod/
H A D	halDMD_INTERN_DVBS.c	140 #define FRONTEND_REG_BASE 0x2800 macro 2836 … status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x112, &u8Data);//FRONTEND_AGC_DEBUG_SEL in INTERN_DVBS_GetTunrSignalLevel_PWR() 2838 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FRONTEND_REG_BASE+0x112, u8Data); in INTERN_DVBS_GetTunrSignalLevel_PWR() 2840 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x02, &u8Data);//FRONTEND_LATCH in INTERN_DVBS_GetTunrSignalLevel_PWR() 2842 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FRONTEND_REG_BASE+0x02, u8Data); in INTERN_DVBS_GetTunrSignalLevel_PWR() 2844 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x122+1, &u8Data);//FRONTEND_AGC_DEBUG_OU… in INTERN_DVBS_GetTunrSignalLevel_PWR() 2846 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x122, &u8Data);//FRONTEND_AGC_DEBUG_OUT_… in INTERN_DVBS_GetTunrSignalLevel_PWR() 2851 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x02, &u8Data);//FRONTEND_LOAD0 in INTERN_DVBS_GetTunrSignalLevel_PWR() 2853 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FRONTEND_REG_BASE+0x02, u8Data); in INTERN_DVBS_GetTunrSignalLevel_PWR() 3939 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE + 0x08*2 + 1,&agc_k); in INTERN_DVBS_Show_AGC_Info() [all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/mustang/demod/
H A D	halDMD_INTERN_DVBS.c	140 #define FRONTEND_REG_BASE 0x2800 macro 3035 … status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x112, &u8Data);//FRONTEND_AGC_DEBUG_SEL in INTERN_DVBS_GetTunrSignalLevel_PWR() 3037 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FRONTEND_REG_BASE+0x112, u8Data); in INTERN_DVBS_GetTunrSignalLevel_PWR() 3039 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x02, &u8Data);//FRONTEND_LATCH in INTERN_DVBS_GetTunrSignalLevel_PWR() 3041 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FRONTEND_REG_BASE+0x02, u8Data); in INTERN_DVBS_GetTunrSignalLevel_PWR() 3043 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x122+1, &u8Data);//FRONTEND_AGC_DEBUG_OU… in INTERN_DVBS_GetTunrSignalLevel_PWR() 3045 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x122, &u8Data);//FRONTEND_AGC_DEBUG_OUT_… in INTERN_DVBS_GetTunrSignalLevel_PWR() 3050 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE+0x02, &u8Data);//FRONTEND_LOAD0 in INTERN_DVBS_GetTunrSignalLevel_PWR() 3052 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(FRONTEND_REG_BASE+0x02, u8Data); in INTERN_DVBS_GetTunrSignalLevel_PWR() 4142 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTEND_REG_BASE + 0x08*2 + 1,&agc_k); in INTERN_DVBS_Show_AGC_Info() [all …]