| /utopia/UTPA2-700.0.x/modules/demodulator/hal/k6lite/demod/ |
| H A D | halDMD_INTERN_DVBS.c | 142 #define FRONTENDEXT_REG_BASE 0x2200 macro 4598 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x5E*2 + 1,&d2_ref); in INTERN_DVBS_Show_AGC_Info() 4600 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6A*2,&d3_k); in INTERN_DVBS_Show_AGC_Info() 4653 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6F*2, &tmp); in INTERN_DVBS_Show_AGC_Info() 4655 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6E*2 + 1, &tmp); in INTERN_DVBS_Show_AGC_Info() 4657 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6E*2, &tmp); in INTERN_DVBS_Show_AGC_Info() 4742 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x5E*2 + 1,&d2_ref); in INTERN_DVBS_AGC_Info() 4744 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6A*2,&d3_k); in INTERN_DVBS_AGC_Info() 4797 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6F*2, &tmp); in INTERN_DVBS_AGC_Info() 4799 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6E*2 + 1, &tmp); in INTERN_DVBS_AGC_Info() [all …]
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/M7621/demod/ |
| H A D | halDMD_INTERN_DVBS.c | 144 #define FRONTENDEXT_REG_BASE 0x2900 macro 4171 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x5E*2 + 1,&d2_ref); in INTERN_DVBS_Show_AGC_Info() 4173 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6A*2,&d3_k); in INTERN_DVBS_Show_AGC_Info() 4226 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6F*2, &tmp); in INTERN_DVBS_Show_AGC_Info() 4228 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6E*2 + 1, &tmp); in INTERN_DVBS_Show_AGC_Info() 4230 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6E*2, &tmp); in INTERN_DVBS_Show_AGC_Info()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/maxim/demod/ |
| H A D | halDMD_INTERN_DVBS.c | 144 #define FRONTENDEXT_REG_BASE 0x2900 macro 4171 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x5E*2 + 1,&d2_ref); in INTERN_DVBS_Show_AGC_Info() 4173 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6A*2,&d3_k); in INTERN_DVBS_Show_AGC_Info() 4226 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6F*2, &tmp); in INTERN_DVBS_Show_AGC_Info() 4228 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6E*2 + 1, &tmp); in INTERN_DVBS_Show_AGC_Info() 4230 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6E*2, &tmp); in INTERN_DVBS_Show_AGC_Info()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/curry/demod/ |
| H A D | halDMD_INTERN_DVBS.c | 144 #define FRONTENDEXT_REG_BASE 0x2900 macro 4016 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x5E*2 + 1,&d2_ref); in INTERN_DVBS_Show_AGC_Info() 4018 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6A*2,&d3_k); in INTERN_DVBS_Show_AGC_Info() 4071 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6F*2, &tmp); in INTERN_DVBS_Show_AGC_Info() 4073 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6E*2 + 1, &tmp); in INTERN_DVBS_Show_AGC_Info() 4075 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6E*2, &tmp); in INTERN_DVBS_Show_AGC_Info()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/maserati/demod/ |
| H A D | halDMD_INTERN_DVBS.c | 144 #define FRONTENDEXT_REG_BASE 0x2900 macro 4159 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x5E*2 + 1,&d2_ref); in INTERN_DVBS_Show_AGC_Info() 4161 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6A*2,&d3_k); in INTERN_DVBS_Show_AGC_Info() 4214 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6F*2, &tmp); in INTERN_DVBS_Show_AGC_Info() 4216 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6E*2 + 1, &tmp); in INTERN_DVBS_Show_AGC_Info() 4218 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6E*2, &tmp); in INTERN_DVBS_Show_AGC_Info()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/M7821/demod/ |
| H A D | halDMD_INTERN_DVBS.c | 144 #define FRONTENDEXT_REG_BASE 0x2900 macro 4159 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x5E*2 + 1,&d2_ref); in INTERN_DVBS_Show_AGC_Info() 4161 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6A*2,&d3_k); in INTERN_DVBS_Show_AGC_Info() 4214 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6F*2, &tmp); in INTERN_DVBS_Show_AGC_Info() 4216 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6E*2 + 1, &tmp); in INTERN_DVBS_Show_AGC_Info() 4218 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6E*2, &tmp); in INTERN_DVBS_Show_AGC_Info()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/k6/demod/ |
| H A D | halDMD_INTERN_DVBS.c | 144 #define FRONTENDEXT_REG_BASE 0x2900 macro 4016 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x5E*2 + 1,&d2_ref); in INTERN_DVBS_Show_AGC_Info() 4018 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6A*2,&d3_k); in INTERN_DVBS_Show_AGC_Info() 4071 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6F*2, &tmp); in INTERN_DVBS_Show_AGC_Info() 4073 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6E*2 + 1, &tmp); in INTERN_DVBS_Show_AGC_Info() 4075 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6E*2, &tmp); in INTERN_DVBS_Show_AGC_Info()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/kano/demod/ |
| H A D | halDMD_INTERN_DVBS.c | 144 #define FRONTENDEXT_REG_BASE 0x2900 macro 4016 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x5E*2 + 1,&d2_ref); in INTERN_DVBS_Show_AGC_Info() 4018 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6A*2,&d3_k); in INTERN_DVBS_Show_AGC_Info() 4071 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6F*2, &tmp); in INTERN_DVBS_Show_AGC_Info() 4073 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6E*2 + 1, &tmp); in INTERN_DVBS_Show_AGC_Info() 4075 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6E*2, &tmp); in INTERN_DVBS_Show_AGC_Info()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/maldives/demod/ |
| H A D | halDMD_INTERN_DVBS.c | 141 #define FRONTENDEXT_REG_BASE 0x2900 macro 3955 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x5E*2 + 1,&d2_ref); in INTERN_DVBS_Show_AGC_Info() 3957 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6A*2,&d3_k); in INTERN_DVBS_Show_AGC_Info() 4010 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6F*2, &tmp); in INTERN_DVBS_Show_AGC_Info() 4012 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6E*2 + 1, &tmp); in INTERN_DVBS_Show_AGC_Info() 4014 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6E*2, &tmp); in INTERN_DVBS_Show_AGC_Info()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/macan/demod/ |
| H A D | halDMD_INTERN_DVBS.c | 141 #define FRONTENDEXT_REG_BASE 0x2900 macro 4137 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x5E*2 + 1,&d2_ref); in INTERN_DVBS_Show_AGC_Info() 4139 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6A*2,&d3_k); in INTERN_DVBS_Show_AGC_Info() 4192 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6F*2, &tmp); in INTERN_DVBS_Show_AGC_Info() 4194 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6E*2 + 1, &tmp); in INTERN_DVBS_Show_AGC_Info() 4196 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6E*2, &tmp); in INTERN_DVBS_Show_AGC_Info()
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| /utopia/UTPA2-700.0.x/modules/demodulator/hal/mustang/demod/ |
| H A D | halDMD_INTERN_DVBS.c | 141 #define FRONTENDEXT_REG_BASE 0x2900 macro 4158 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x5E*2 + 1,&d2_ref); in INTERN_DVBS_Show_AGC_Info() 4160 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6A*2,&d3_k); in INTERN_DVBS_Show_AGC_Info() 4213 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6F*2, &tmp); in INTERN_DVBS_Show_AGC_Info() 4215 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6E*2 + 1, &tmp); in INTERN_DVBS_Show_AGC_Info() 4217 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(FRONTENDEXT_REG_BASE + 0x6E*2, &tmp); in INTERN_DVBS_Show_AGC_Info()
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