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Searched refs:E_FIQL_START (Results 1 – 25 of 58) sorted by relevance

123

/utopia/UTPA2-700.0.x/mxlib/hal/mustang/
H A DhalIRQTBL.h184 E_FIQL_START = CONFIG_FIQL_BASE_ADDRESS, enumerator
185 E_FIQ_00 = E_FIQL_START + 0,
186 E_FIQ_01 = E_FIQL_START + 1,
187 E_FIQ_02 = E_FIQL_START + 2,
188 E_FIQ_03 = E_FIQL_START + 3,
189 E_FIQ_04 = E_FIQL_START + 4,
190 E_FIQ_05 = E_FIQL_START + 5,
191 E_FIQ_06 = E_FIQL_START + 6,
192 E_FIQ_07 = E_FIQL_START + 7,
193 E_FIQ_08 = E_FIQL_START + 8,
[all …]
H A DregCHIP.h151 #define FIQ_EXTIMER0 (0x01 << (E_FIQ_00 - E_FIQL_START))
152 #define FIQ_EXTIMER1 (0x01 << (E_FIQ_01 - E_FIQL_START))
153 #define FIQ_WDT (0x01 << (E_FIQ_02 - E_FIQL_START))
155 #define FIQ_R2TOMCU_INT0 (0x01 << (E_FIQ_04 - E_FIQL_START))
156 #define FIQ_R2TOMCU_INT1 (0x01 << (E_FIQ_05 - E_FIQL_START))
157 #define FIQ_DSPTOMCU_INT0 (0x01 << (E_FIQ_06 - E_FIQL_START))
158 #define FIQ_DSPTOMCU_INT1 (0x01 << (E_FIQ_07 - E_FIQL_START))
159 #define FIQ_TEMPERATURE_FLAG_FALL (0x01 << (E_FIQ_08 - E_FIQL_START))
160 #define FIQ_TEMPERATURE_FLAG_RISE (0x01 << (E_FIQ_09 - E_FIQL_START))
162 #define FIQ_HDMI_NON_PCM (0x01 << (E_FIQ_11 - E_FIQL_START))
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/messi/
H A DhalIRQTBL.h218 E_FIQL_START = CONFIG_FIQL_BASE_ADDRESS, enumerator
219 E_FIQ_00 = E_FIQL_START + 0,
220 E_FIQ_01 = E_FIQL_START + 1,
221 E_FIQ_02 = E_FIQL_START + 2,
222 E_FIQ_03 = E_FIQL_START + 3,
223 E_FIQ_04 = E_FIQL_START + 4,
224 E_FIQ_05 = E_FIQL_START + 5,
225 E_FIQ_06 = E_FIQL_START + 6,
226 E_FIQ_07 = E_FIQL_START + 7,
227 E_FIQ_08 = E_FIQL_START + 8,
[all …]
H A DregCHIP.h151 #define FIQ_EXTIMER0 (0x01 << (E_FIQ_00 - E_FIQL_START))
152 #define FIQ_EXTIMER1 (0x01 << (E_FIQ_01 - E_FIQL_START))
153 #define FIQ_WDT (0x01 << (E_FIQ_02 - E_FIQL_START))
155 #define FIQ_R2TOMCU_INT0 (0x01 << (E_FIQ_04 - E_FIQL_START))
156 #define FIQ_R2TOMCU_INT1 (0x01 << (E_FIQ_05 - E_FIQL_START))
157 #define FIQ_DSPTOMCU_INT0 (0x01 << (E_FIQ_06 - E_FIQL_START))
158 #define FIQ_DSPTOMCU_INT1 (0x01 << (E_FIQ_07 - E_FIQL_START))
159 #define FIQ_USB (0x01 << (E_FIQ_08 - E_FIQL_START))
160 #define FIQ_USC (0x01 << (E_FIQ_09 - E_FIQL_START))
162 #define FIQ_HDMI_NON_PCM (0x01 << (E_FIQ_11 - E_FIQL_START))
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/mainz/
H A DhalIRQTBL.h218 E_FIQL_START = CONFIG_FIQL_BASE_ADDRESS, enumerator
219 E_FIQ_00 = E_FIQL_START + 0,
220 E_FIQ_01 = E_FIQL_START + 1,
221 E_FIQ_02 = E_FIQL_START + 2,
222 E_FIQ_03 = E_FIQL_START + 3,
223 E_FIQ_04 = E_FIQL_START + 4,
224 E_FIQ_05 = E_FIQL_START + 5,
225 E_FIQ_06 = E_FIQL_START + 6,
226 E_FIQ_07 = E_FIQL_START + 7,
227 E_FIQ_08 = E_FIQL_START + 8,
[all …]
H A DregCHIP.h151 #define FIQ_EXTIMER0 (0x01 << (E_FIQ_00 - E_FIQL_START))
152 #define FIQ_EXTIMER1 (0x01 << (E_FIQ_01 - E_FIQL_START))
153 #define FIQ_WDT (0x01 << (E_FIQ_02 - E_FIQL_START))
155 #define FIQ_R2TOMCU_INT0 (0x01 << (E_FIQ_04 - E_FIQL_START))
156 #define FIQ_R2TOMCU_INT1 (0x01 << (E_FIQ_05 - E_FIQL_START))
157 #define FIQ_DSPTOMCU_INT0 (0x01 << (E_FIQ_06 - E_FIQL_START))
158 #define FIQ_DSPTOMCU_INT1 (0x01 << (E_FIQ_07 - E_FIQL_START))
159 #define FIQ_USB (0x01 << (E_FIQ_08 - E_FIQL_START))
160 #define FIQ_USC (0x01 << (E_FIQ_09 - E_FIQL_START))
162 #define FIQ_HDMI_NON_PCM (0x01 << (E_FIQ_11 - E_FIQL_START))
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/kano/
H A DhalIRQTBL.h247 E_FIQL_START = CONFIG_FIQL_BASE_ADDRESS, enumerator
248 E_FIQ_00 = E_FIQL_START + 0,
249 E_FIQ_01 = E_FIQL_START + 1,
250 E_FIQ_02 = E_FIQL_START + 2,
251 E_FIQ_03 = E_FIQL_START + 3,
252 E_FIQ_04 = E_FIQL_START + 4,
253 E_FIQ_05 = E_FIQL_START + 5,
254 E_FIQ_06 = E_FIQL_START + 6,
255 E_FIQ_07 = E_FIQL_START + 7,
256 E_FIQ_08 = E_FIQL_START + 8,
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/k7u/
H A DhalIRQTBL.h247 E_FIQL_START = CONFIG_FIQL_BASE_ADDRESS, enumerator
248 E_FIQ_00 = E_FIQL_START + 0,
249 E_FIQ_01 = E_FIQL_START + 1,
250 E_FIQ_02 = E_FIQL_START + 2,
251 E_FIQ_03 = E_FIQL_START + 3,
252 E_FIQ_04 = E_FIQL_START + 4,
253 E_FIQ_05 = E_FIQL_START + 5,
254 E_FIQ_06 = E_FIQL_START + 6,
255 E_FIQ_07 = E_FIQL_START + 7,
256 E_FIQ_08 = E_FIQL_START + 8,
[all …]
H A DregCHIP.h199 #define FIQ_EXTIMER0 (0x01 << (E_FIQ_00 - E_FIQL_START))
200 #define FIQ_EXTIMER1 (0x01 << (E_FIQ_01 - E_FIQL_START))
201 #define FIQ_WDT (0x01 << (E_FIQ_02 - E_FIQL_START))
203 #define FIQ_R2TOMCU_INT0 (0x01 << (E_FIQ_04 - E_FIQL_START))
204 #define FIQ_R2TOMCU_INT1 (0x01 << (E_FIQ_05 - E_FIQL_START))
205 #define FIQ_DSPTOMCU_INT0 (0x01 << (E_FIQ_06 - E_FIQL_START))
206 #define FIQ_DSPTOMCU_INT1 (0x01 << (E_FIQ_07 - E_FIQL_START))
207 #define FIQ_TEMPERATURE_FLAG_FALL (0x01 << (E_FIQ_08 - E_FIQL_START))
208 #define FIQ_TEMPERATURE_FLAG_RISE (0x01 << (E_FIQ_09 - E_FIQL_START))
210 #define FIQ_HDMI_NON_PCM (0x01 << (E_FIQ_11 - E_FIQL_START))
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/manhattan/
H A DhalIRQTBL.h228 E_FIQL_START = CONFIG_FIQL_BASE_ADDRESS, enumerator
229 E_FIQ_00 = E_FIQL_START + 0,
230 E_FIQ_01 = E_FIQL_START + 1,
231 E_FIQ_02 = E_FIQL_START + 2,
232 E_FIQ_03 = E_FIQL_START + 3,
233 E_FIQ_04 = E_FIQL_START + 4,
234 E_FIQ_05 = E_FIQL_START + 5,
235 E_FIQ_06 = E_FIQL_START + 6,
236 E_FIQ_07 = E_FIQL_START + 7,
237 E_FIQ_08 = E_FIQL_START + 8,
[all …]
H A DregCHIP.h187 #define FIQ_EXTIMER0 (0x1 << (E_FIQ_EXTIMER0 - E_FIQL_START) )
188 #define FIQ_EXTIMER1 (0x1 << (E_FIQ_EXTIMER1 - E_FIQL_START) )
189 #define FIQ_WDT (0x1 << (E_FIQ_WDT - E_FIQL_START) )
190 #define FIQ_MB_auR2toMCU_INT0 (0x1 << (E_FIQ_AEON_MB2_MCU0 - E_FIQL_START) )
191 #define FIQ_MB_auR2toMCU_INT1 (0x1 << (E_FIQ_AEON_MB2_MCU1 - E_FIQL_START) )
192 #define FIQ_MB_DSP2toMCU_INT0 (0x1 << (E_FIQ_DSP2_MB2_MCU0 - E_FIQL_START) )
193 #define FIQ_MB_DSP2toMCU_INT1 (0x1 << (E_FIQ_DSP2_MB2_MCU1 - E_FIQL_START) )
194 #define FIQ_USB_INT (0x1 << (E_FIQ_USB - E_FIQL_START) )
195 #define FIQ_UHC_INT (0x1 << (E_FIQ_UHC - E_FIQL_START) )
196 #define FIQ_HDMI_NON_PCM (0x1 << (E_FIQ_HDMI_NON_PCM - E_FIQL_START) )
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/k6lite/
H A DhalIRQTBL.h247 E_FIQL_START = CONFIG_FIQL_BASE_ADDRESS, enumerator
248 E_FIQ_00 = E_FIQL_START + 0,
249 E_FIQ_01 = E_FIQL_START + 1,
250 E_FIQ_02 = E_FIQL_START + 2,
251 E_FIQ_03 = E_FIQL_START + 3,
252 E_FIQ_04 = E_FIQL_START + 4,
253 E_FIQ_05 = E_FIQL_START + 5,
254 E_FIQ_06 = E_FIQL_START + 6,
255 E_FIQ_07 = E_FIQL_START + 7,
256 E_FIQ_08 = E_FIQL_START + 8,
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/k6/
H A DhalIRQTBL.h247 E_FIQL_START = CONFIG_FIQL_BASE_ADDRESS, enumerator
248 E_FIQ_00 = E_FIQL_START + 0,
249 E_FIQ_01 = E_FIQL_START + 1,
250 E_FIQ_02 = E_FIQL_START + 2,
251 E_FIQ_03 = E_FIQL_START + 3,
252 E_FIQ_04 = E_FIQL_START + 4,
253 E_FIQ_05 = E_FIQL_START + 5,
254 E_FIQ_06 = E_FIQL_START + 6,
255 E_FIQ_07 = E_FIQL_START + 7,
256 E_FIQ_08 = E_FIQL_START + 8,
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/curry/
H A DhalIRQTBL.h247 E_FIQL_START = CONFIG_FIQL_BASE_ADDRESS, enumerator
248 E_FIQ_00 = E_FIQL_START + 0,
249 E_FIQ_01 = E_FIQL_START + 1,
250 E_FIQ_02 = E_FIQL_START + 2,
251 E_FIQ_03 = E_FIQL_START + 3,
252 E_FIQ_04 = E_FIQL_START + 4,
253 E_FIQ_05 = E_FIQL_START + 5,
254 E_FIQ_06 = E_FIQL_START + 6,
255 E_FIQ_07 = E_FIQL_START + 7,
256 E_FIQ_08 = E_FIQL_START + 8,
[all …]
H A DregCHIP.h199 #define FIQ_EXTIMER0 (0x01 << (E_FIQ_00 - E_FIQL_START))
200 #define FIQ_EXTIMER1 (0x01 << (E_FIQ_01 - E_FIQL_START))
201 #define FIQ_WDT (0x01 << (E_FIQ_02 - E_FIQL_START))
203 #define FIQ_R2TOMCU_INT0 (0x01 << (E_FIQ_04 - E_FIQL_START))
204 #define FIQ_R2TOMCU_INT1 (0x01 << (E_FIQ_05 - E_FIQL_START))
205 #define FIQ_DSPTOMCU_INT0 (0x01 << (E_FIQ_06 - E_FIQL_START))
206 #define FIQ_DSPTOMCU_INT1 (0x01 << (E_FIQ_07 - E_FIQL_START))
207 #define FIQ_TEMPERATURE_FLAG_FALL (0x01 << (E_FIQ_08 - E_FIQL_START))
208 #define FIQ_TEMPERATURE_FLAG_RISE (0x01 << (E_FIQ_09 - E_FIQL_START))
210 #define FIQ_HDMI_NON_PCM (0x01 << (E_FIQ_11 - E_FIQL_START))
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/M7621/
H A DregCHIP.h191 #define FIQ_EXTIMER0 (0x1 << (E_FIQ_EXTIMER0 - E_FIQL_START) )
192 #define FIQ_EXTIMER1 (0x1 << (E_FIQ_EXTIMER1 - E_FIQL_START) )
193 #define FIQ_WDT (0x1 << (E_FIQ_WDT - E_FIQL_START) )
194 #define FIQ_MB_auR2toMCU_INT0 (0x1 << (E_FIQ_AEON_MB2_MCU0 - E_FIQL_START) )
195 #define FIQ_MB_auR2toMCU_INT1 (0x1 << (E_FIQ_AEON_MB2_MCU1 - E_FIQL_START) )
196 #define FIQ_MB_DSP2toMCU_INT0 (0x1 << (E_FIQ_DSP2_MB2_MCU0 - E_FIQL_START) )
197 #define FIQ_MB_DSP2toMCU_INT1 (0x1 << (E_FIQ_DSP2_MB2_MCU1 - E_FIQL_START) )
198 #define FIQ_USB_INT (0x1 << (E_FIQ_USB - E_FIQL_START) )
199 #define FIQ_UHC_INT (0x1 << (E_FIQ_UHC - E_FIQL_START) )
200 #define FIQ_HDMI_NON_PCM (0x1 << (E_FIQ_HDMI_NON_PCM - E_FIQL_START) )
[all …]
H A DhalIRQTBL.h235 E_FIQL_START = CONFIG_FIQL_BASE_ADDRESS, enumerator
236 E_FIQ_00 = E_FIQL_START + 0,
237 E_FIQ_01 = E_FIQL_START + 1,
238 E_FIQ_02 = E_FIQL_START + 2,
239 E_FIQ_03 = E_FIQL_START + 3,
240 E_FIQ_04 = E_FIQL_START + 4,
241 E_FIQ_05 = E_FIQL_START + 5,
242 E_FIQ_06 = E_FIQL_START + 6,
243 E_FIQ_07 = E_FIQL_START + 7,
244 E_FIQ_08 = E_FIQL_START + 8,
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/maxim/
H A DregCHIP.h187 #define FIQ_EXTIMER0 (0x1 << (E_FIQ_EXTIMER0 - E_FIQL_START) )
188 #define FIQ_EXTIMER1 (0x1 << (E_FIQ_EXTIMER1 - E_FIQL_START) )
189 #define FIQ_WDT (0x1 << (E_FIQ_WDT - E_FIQL_START) )
190 #define FIQ_MB_auR2toMCU_INT0 (0x1 << (E_FIQ_AEON_MB2_MCU0 - E_FIQL_START) )
191 #define FIQ_MB_auR2toMCU_INT1 (0x1 << (E_FIQ_AEON_MB2_MCU1 - E_FIQL_START) )
192 #define FIQ_MB_DSP2toMCU_INT0 (0x1 << (E_FIQ_DSP2_MB2_MCU0 - E_FIQL_START) )
193 #define FIQ_MB_DSP2toMCU_INT1 (0x1 << (E_FIQ_DSP2_MB2_MCU1 - E_FIQL_START) )
194 #define FIQ_USB_INT (0x1 << (E_FIQ_USB - E_FIQL_START) )
195 #define FIQ_UHC_INT (0x1 << (E_FIQ_UHC - E_FIQL_START) )
196 #define FIQ_HDMI_NON_PCM (0x1 << (E_FIQ_HDMI_NON_PCM - E_FIQL_START) )
[all …]
H A DhalIRQTBL.h228 E_FIQL_START = CONFIG_FIQL_BASE_ADDRESS, enumerator
229 E_FIQ_00 = E_FIQL_START + 0,
230 E_FIQ_01 = E_FIQL_START + 1,
231 E_FIQ_02 = E_FIQL_START + 2,
232 E_FIQ_03 = E_FIQL_START + 3,
233 E_FIQ_04 = E_FIQL_START + 4,
234 E_FIQ_05 = E_FIQL_START + 5,
235 E_FIQ_06 = E_FIQL_START + 6,
236 E_FIQ_07 = E_FIQL_START + 7,
237 E_FIQ_08 = E_FIQL_START + 8,
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/marcus/
H A DregCHIP.h187 #define FIQ_EXTIMER0 (0x1 << (E_FIQ_EXTIMER0 - E_FIQL_START) )
188 #define FIQ_EXTIMER1 (0x1 << (E_FIQ_EXTIMER1 - E_FIQL_START) )
189 #define FIQ_WDT (0x1 << (E_FIQ_WDT - E_FIQL_START) )
190 #define FIQ_MB_auR2toMCU_INT0 (0x1 << (E_FIQ_AEON_MB2_MCU0 - E_FIQL_START) )
191 #define FIQ_MB_auR2toMCU_INT1 (0x1 << (E_FIQ_AEON_MB2_MCU1 - E_FIQL_START) )
192 #define FIQ_MB_DSP2toMCU_INT0 (0x1 << (E_FIQ_DSP2_MB2_MCU0 - E_FIQL_START) )
193 #define FIQ_MB_DSP2toMCU_INT1 (0x1 << (E_FIQ_DSP2_MB2_MCU1 - E_FIQL_START) )
194 #define FIQ_USB_INT (0x1 << (E_FIQ_USB - E_FIQL_START) )
195 #define FIQ_UHC_INT (0x1 << (E_FIQ_UHC - E_FIQL_START) )
196 #define FIQ_HDMI_NON_PCM (0x1 << (E_FIQ_HDMI_NON_PCM - E_FIQL_START) )
[all …]
H A DhalIRQTBL.h228 E_FIQL_START = CONFIG_FIQL_BASE_ADDRESS, enumerator
229 E_FIQ_00 = E_FIQL_START + 0,
230 E_FIQ_01 = E_FIQL_START + 1,
231 E_FIQ_02 = E_FIQL_START + 2,
232 E_FIQ_03 = E_FIQL_START + 3,
233 E_FIQ_04 = E_FIQL_START + 4,
234 E_FIQ_05 = E_FIQL_START + 5,
235 E_FIQ_06 = E_FIQL_START + 6,
236 E_FIQ_07 = E_FIQL_START + 7,
237 E_FIQ_08 = E_FIQL_START + 8,
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/M7821/
H A DregCHIP.h191 #define FIQ_EXTIMER0 (0x1 << (E_FIQ_EXTIMER0 - E_FIQL_START) )
192 #define FIQ_EXTIMER1 (0x1 << (E_FIQ_EXTIMER1 - E_FIQL_START) )
193 #define FIQ_WDT (0x1 << (E_FIQ_WDT - E_FIQL_START) )
194 #define FIQ_MB_auR2toMCU_INT0 (0x1 << (E_FIQ_AEON_MB2_MCU0 - E_FIQL_START) )
195 #define FIQ_MB_auR2toMCU_INT1 (0x1 << (E_FIQ_AEON_MB2_MCU1 - E_FIQL_START) )
196 #define FIQ_MB_DSP2toMCU_INT0 (0x1 << (E_FIQ_DSP2_MB2_MCU0 - E_FIQL_START) )
197 #define FIQ_MB_DSP2toMCU_INT1 (0x1 << (E_FIQ_DSP2_MB2_MCU1 - E_FIQL_START) )
198 #define FIQ_USB_INT (0x1 << (E_FIQ_USB - E_FIQL_START) )
199 #define FIQ_UHC_INT (0x1 << (E_FIQ_UHC - E_FIQL_START) )
200 #define FIQ_HDMI_NON_PCM (0x1 << (E_FIQ_HDMI_NON_PCM - E_FIQL_START) )
[all …]
H A DhalIRQTBL.h235 E_FIQL_START = CONFIG_FIQL_BASE_ADDRESS, enumerator
236 E_FIQ_00 = E_FIQL_START + 0,
237 E_FIQ_01 = E_FIQL_START + 1,
238 E_FIQ_02 = E_FIQL_START + 2,
239 E_FIQ_03 = E_FIQL_START + 3,
240 E_FIQ_04 = E_FIQL_START + 4,
241 E_FIQ_05 = E_FIQL_START + 5,
242 E_FIQ_06 = E_FIQL_START + 6,
243 E_FIQ_07 = E_FIQL_START + 7,
244 E_FIQ_08 = E_FIQL_START + 8,
[all …]
/utopia/UTPA2-700.0.x/mxlib/hal/maserati/
H A DregCHIP.h187 #define FIQ_EXTIMER0 (0x1 << (E_FIQ_EXTIMER0 - E_FIQL_START) )
188 #define FIQ_EXTIMER1 (0x1 << (E_FIQ_EXTIMER1 - E_FIQL_START) )
189 #define FIQ_WDT (0x1 << (E_FIQ_WDT - E_FIQL_START) )
190 #define FIQ_MB_auR2toMCU_INT0 (0x1 << (E_FIQ_AEON_MB2_MCU0 - E_FIQL_START) )
191 #define FIQ_MB_auR2toMCU_INT1 (0x1 << (E_FIQ_AEON_MB2_MCU1 - E_FIQL_START) )
192 #define FIQ_MB_DSP2toMCU_INT0 (0x1 << (E_FIQ_DSP2_MB2_MCU0 - E_FIQL_START) )
193 #define FIQ_MB_DSP2toMCU_INT1 (0x1 << (E_FIQ_DSP2_MB2_MCU1 - E_FIQL_START) )
194 #define FIQ_USB_INT (0x1 << (E_FIQ_USB - E_FIQL_START) )
195 #define FIQ_UHC_INT (0x1 << (E_FIQ_UHC - E_FIQL_START) )
196 #define FIQ_HDMI_NON_PCM (0x1 << (E_FIQ_HDMI_NON_PCM - E_FIQL_START) )
[all …]
H A DhalIRQTBL.h228 E_FIQL_START = CONFIG_FIQL_BASE_ADDRESS, enumerator
229 E_FIQ_00 = E_FIQL_START + 0,
230 E_FIQ_01 = E_FIQL_START + 1,
231 E_FIQ_02 = E_FIQL_START + 2,
232 E_FIQ_03 = E_FIQL_START + 3,
233 E_FIQ_04 = E_FIQL_START + 4,
234 E_FIQ_05 = E_FIQL_START + 5,
235 E_FIQ_06 = E_FIQL_START + 6,
236 E_FIQ_07 = E_FIQL_START + 7,
237 E_FIQ_08 = E_FIQL_START + 8,
[all …]

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