DVBSFEC_REG_BASE (reference) in projects: utopia

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Searched refs:DVBSFEC_REG_BASE (Results 1 – 11 of 11) sorted by relevance

/utopia/UTPA2-700.0.x/modules/demodulator/hal/k6lite/demod/
H A D	halDMD_INTERN_DVBS.c	276 #define DVBSFEC_REG_BASE 0x2800 macro 277 #define _REG_DVBSFEC(idx) (DVBSFEC_REG_BASE + (idx)2) 3229 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x082, &reg_frz);//h0001 h0001 8 … in INTERN_DVBS_GetPostViterbiBer() 3230 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBSFEC_REG_BASE+0x082, reg_frz\|0x08); in INTERN_DVBS_GetPostViterbiBer() 3237 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x182+1, &reg); in INTERN_DVBS_GetPostViterbiBer() 3240 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x182, &reg); in INTERN_DVBS_GetPostViterbiBer() 3249 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1E2+1, &reg); in INTERN_DVBS_GetPostViterbiBer() 3251 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1E2, &reg); in INTERN_DVBS_GetPostViterbiBer() 3253 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1D2+1, &reg); in INTERN_DVBS_GetPostViterbiBer() 3255 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1D*2, &reg); in INTERN_DVBS_GetPostViterbiBer() [all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/M7621/demod/
H A D	halDMD_INTERN_DVBS.c	136 #define DVBSFEC_REG_BASE 0x3F00 macro 3121 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x12+1, &reg_frz);//h0001 h0001 8 … in INTERN_DVBS_GetPostViterbiBer() 3122 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBSFEC_REG_BASE+0x12+1, reg_frz\|0x01); in INTERN_DVBS_GetPostViterbiBer() 3129 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x182+1, &reg); in INTERN_DVBS_GetPostViterbiBer() 3132 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x182, &reg); in INTERN_DVBS_GetPostViterbiBer() 3141 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1E2+1, &reg); in INTERN_DVBS_GetPostViterbiBer() 3143 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1E2, &reg); in INTERN_DVBS_GetPostViterbiBer() 3145 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1D2+1, &reg); in INTERN_DVBS_GetPostViterbiBer() 3147 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1D2, &reg); in INTERN_DVBS_GetPostViterbiBer() 3152 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBSFEC_REG_BASE+0x1*2+1, reg_frz); in INTERN_DVBS_GetPostViterbiBer() [all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maxim/demod/
H A D	halDMD_INTERN_DVBS.c	136 #define DVBSFEC_REG_BASE 0x3F00 macro 3121 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x12+1, &reg_frz);//h0001 h0001 8 … in INTERN_DVBS_GetPostViterbiBer() 3122 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBSFEC_REG_BASE+0x12+1, reg_frz\|0x01); in INTERN_DVBS_GetPostViterbiBer() 3129 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x182+1, &reg); in INTERN_DVBS_GetPostViterbiBer() 3132 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x182, &reg); in INTERN_DVBS_GetPostViterbiBer() 3141 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1E2+1, &reg); in INTERN_DVBS_GetPostViterbiBer() 3143 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1E2, &reg); in INTERN_DVBS_GetPostViterbiBer() 3145 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1D2+1, &reg); in INTERN_DVBS_GetPostViterbiBer() 3147 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1D2, &reg); in INTERN_DVBS_GetPostViterbiBer() 3152 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBSFEC_REG_BASE+0x1*2+1, reg_frz); in INTERN_DVBS_GetPostViterbiBer() [all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/curry/demod/
H A D	halDMD_INTERN_DVBS.c	136 #define DVBSFEC_REG_BASE 0x3F00 macro 2966 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x12+1, &reg_frz);//h0001 h0001 8 … in INTERN_DVBS_GetPostViterbiBer() 2967 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBSFEC_REG_BASE+0x12+1, reg_frz\|0x01); in INTERN_DVBS_GetPostViterbiBer() 2974 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x182+1, &reg); in INTERN_DVBS_GetPostViterbiBer() 2977 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x182, &reg); in INTERN_DVBS_GetPostViterbiBer() 2986 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1E2+1, &reg); in INTERN_DVBS_GetPostViterbiBer() 2988 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1E2, &reg); in INTERN_DVBS_GetPostViterbiBer() 2990 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1D2+1, &reg); in INTERN_DVBS_GetPostViterbiBer() 2992 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1D2, &reg); in INTERN_DVBS_GetPostViterbiBer() 2997 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBSFEC_REG_BASE+0x1*2+1, reg_frz); in INTERN_DVBS_GetPostViterbiBer() [all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maserati/demod/
H A D	halDMD_INTERN_DVBS.c	136 #define DVBSFEC_REG_BASE 0x3F00 macro 3109 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x12+1, &reg_frz);//h0001 h0001 8 … in INTERN_DVBS_GetPostViterbiBer() 3110 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBSFEC_REG_BASE+0x12+1, reg_frz\|0x01); in INTERN_DVBS_GetPostViterbiBer() 3117 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x182+1, &reg); in INTERN_DVBS_GetPostViterbiBer() 3120 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x182, &reg); in INTERN_DVBS_GetPostViterbiBer() 3129 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1E2+1, &reg); in INTERN_DVBS_GetPostViterbiBer() 3131 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1E2, &reg); in INTERN_DVBS_GetPostViterbiBer() 3133 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1D2+1, &reg); in INTERN_DVBS_GetPostViterbiBer() 3135 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1D2, &reg); in INTERN_DVBS_GetPostViterbiBer() 3140 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBSFEC_REG_BASE+0x1*2+1, reg_frz); in INTERN_DVBS_GetPostViterbiBer() [all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/M7821/demod/
H A D	halDMD_INTERN_DVBS.c	136 #define DVBSFEC_REG_BASE 0x3F00 macro 3109 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x12+1, &reg_frz);//h0001 h0001 8 … in INTERN_DVBS_GetPostViterbiBer() 3110 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBSFEC_REG_BASE+0x12+1, reg_frz\|0x01); in INTERN_DVBS_GetPostViterbiBer() 3117 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x182+1, &reg); in INTERN_DVBS_GetPostViterbiBer() 3120 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x182, &reg); in INTERN_DVBS_GetPostViterbiBer() 3129 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1E2+1, &reg); in INTERN_DVBS_GetPostViterbiBer() 3131 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1E2, &reg); in INTERN_DVBS_GetPostViterbiBer() 3133 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1D2+1, &reg); in INTERN_DVBS_GetPostViterbiBer() 3135 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1D2, &reg); in INTERN_DVBS_GetPostViterbiBer() 3140 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBSFEC_REG_BASE+0x1*2+1, reg_frz); in INTERN_DVBS_GetPostViterbiBer() [all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/k6/demod/
H A D	halDMD_INTERN_DVBS.c	136 #define DVBSFEC_REG_BASE 0x3F00 macro 2966 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x12+1, &reg_frz);//h0001 h0001 8 … in INTERN_DVBS_GetPostViterbiBer() 2967 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBSFEC_REG_BASE+0x12+1, reg_frz\|0x01); in INTERN_DVBS_GetPostViterbiBer() 2974 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x182+1, &reg); in INTERN_DVBS_GetPostViterbiBer() 2977 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x182, &reg); in INTERN_DVBS_GetPostViterbiBer() 2986 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1E2+1, &reg); in INTERN_DVBS_GetPostViterbiBer() 2988 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1E2, &reg); in INTERN_DVBS_GetPostViterbiBer() 2990 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1D2+1, &reg); in INTERN_DVBS_GetPostViterbiBer() 2992 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1D2, &reg); in INTERN_DVBS_GetPostViterbiBer() 2997 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBSFEC_REG_BASE+0x1*2+1, reg_frz); in INTERN_DVBS_GetPostViterbiBer() [all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/kano/demod/
H A D	halDMD_INTERN_DVBS.c	136 #define DVBSFEC_REG_BASE 0x3F00 macro 2966 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x12+1, &reg_frz);//h0001 h0001 8 … in INTERN_DVBS_GetPostViterbiBer() 2967 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBSFEC_REG_BASE+0x12+1, reg_frz\|0x01); in INTERN_DVBS_GetPostViterbiBer() 2974 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x182+1, &reg); in INTERN_DVBS_GetPostViterbiBer() 2977 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x182, &reg); in INTERN_DVBS_GetPostViterbiBer() 2986 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1E2+1, &reg); in INTERN_DVBS_GetPostViterbiBer() 2988 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1E2, &reg); in INTERN_DVBS_GetPostViterbiBer() 2990 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1D2+1, &reg); in INTERN_DVBS_GetPostViterbiBer() 2992 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1D2, &reg); in INTERN_DVBS_GetPostViterbiBer() 2997 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBSFEC_REG_BASE+0x1*2+1, reg_frz); in INTERN_DVBS_GetPostViterbiBer() [all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/maldives/demod/
H A D	halDMD_INTERN_DVBS.c	133 #define DVBSFEC_REG_BASE 0x3F00 macro 2915 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x12+1, &reg_frz);//h0001 h0001 8 … in INTERN_DVBS_GetPostViterbiBer() 2916 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBSFEC_REG_BASE+0x12+1, reg_frz\|0x01); in INTERN_DVBS_GetPostViterbiBer() 2923 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x182+1, &reg); in INTERN_DVBS_GetPostViterbiBer() 2926 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x182, &reg); in INTERN_DVBS_GetPostViterbiBer() 2935 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1E2+1, &reg); in INTERN_DVBS_GetPostViterbiBer() 2937 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1E2, &reg); in INTERN_DVBS_GetPostViterbiBer() 2939 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1D2+1, &reg); in INTERN_DVBS_GetPostViterbiBer() 2941 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1D2, &reg); in INTERN_DVBS_GetPostViterbiBer() 2946 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBSFEC_REG_BASE+0x1*2+1, reg_frz); in INTERN_DVBS_GetPostViterbiBer() [all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/macan/demod/
H A D	halDMD_INTERN_DVBS.c	133 #define DVBSFEC_REG_BASE 0x3F00 macro 3096 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x12+1, &reg_frz);//h0001 h0001 8 … in INTERN_DVBS_GetPostViterbiBer() 3097 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBSFEC_REG_BASE+0x12+1, reg_frz\|0x01); in INTERN_DVBS_GetPostViterbiBer() 3104 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x182+1, &reg); in INTERN_DVBS_GetPostViterbiBer() 3107 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x182, &reg); in INTERN_DVBS_GetPostViterbiBer() 3116 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1E2+1, &reg); in INTERN_DVBS_GetPostViterbiBer() 3118 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1E2, &reg); in INTERN_DVBS_GetPostViterbiBer() 3120 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1D2+1, &reg); in INTERN_DVBS_GetPostViterbiBer() 3122 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1D2, &reg); in INTERN_DVBS_GetPostViterbiBer() 3127 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBSFEC_REG_BASE+0x1*2+1, reg_frz); in INTERN_DVBS_GetPostViterbiBer() [all …]
/utopia/UTPA2-700.0.x/modules/demodulator/hal/mustang/demod/
H A D	halDMD_INTERN_DVBS.c	133 #define DVBSFEC_REG_BASE 0x3F00 macro 3118 …status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x12+1, &reg_frz);//h0001 h0001 8 … in INTERN_DVBS_GetPostViterbiBer() 3119 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBSFEC_REG_BASE+0x12+1, reg_frz\|0x01); in INTERN_DVBS_GetPostViterbiBer() 3126 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x182+1, &reg); in INTERN_DVBS_GetPostViterbiBer() 3129 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x182, &reg); in INTERN_DVBS_GetPostViterbiBer() 3138 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1E2+1, &reg); in INTERN_DVBS_GetPostViterbiBer() 3140 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1E2, &reg); in INTERN_DVBS_GetPostViterbiBer() 3142 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1D2+1, &reg); in INTERN_DVBS_GetPostViterbiBer() 3144 status &= MDrv_SYS_DMD_VD_MBX_ReadReg(DVBSFEC_REG_BASE+0x1D2, &reg); in INTERN_DVBS_GetPostViterbiBer() 3149 status &= MDrv_SYS_DMD_VD_MBX_WriteReg(DVBSFEC_REG_BASE+0x1*2+1, reg_frz); in INTERN_DVBS_GetPostViterbiBer() [all …]